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1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Config file for Compulab CM-T335 board
4  *
5  * Copyright (C) 2013, Compulab Ltd - http://compulab.co.il/
6  *
7  * Author: Ilya Ledvich <ilya@compulab.co.il>
8  */
9
10 #ifndef __CONFIG_CM_T335_H
11 #define __CONFIG_CM_T335_H
12
13 #define CONFIG_CM_T335
14
15 #include <configs/ti_am335x_common.h>
16
17 #undef CONFIG_MAX_RAM_BANK_SIZE
18 #define CONFIG_MAX_RAM_BANK_SIZE        (512 << 20)     /* 512MB */
19
20 #define CONFIG_MACH_TYPE                MACH_TYPE_CM_T335
21
22 /* Clock Defines */
23 #define V_OSCK                          25000000  /* Clock output from T2 */
24 #define V_SCLK                          (V_OSCK)
25
26 #define CONFIG_ENV_SIZE                 (16 << 10)      /* 16 KiB */
27
28 #ifndef CONFIG_SPL_BUILD
29 #define MMCARGS \
30         "mmcdev=0\0" \
31         "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \
32         "mmcrootfstype=ext4\0" \
33         "mmcargs=setenv bootargs console=${console} " \
34                 "root=${mmcroot} " \
35                 "rootfstype=${mmcrootfstype}\0" \
36         "mmcboot=echo Booting from mmc ...; " \
37                 "run mmcargs; " \
38                 "bootm ${loadaddr}\0"
39
40 #define NANDARGS \
41         "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \
42         "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
43         "nandroot=ubi0:rootfs rw\0" \
44         "nandrootfstype=ubifs\0" \
45         "nandargs=setenv bootargs console=${console} " \
46                 "root=${nandroot} " \
47                 "rootfstype=${nandrootfstype} " \
48                 "ubi.mtd=${rootfs_name}\0" \
49         "nandboot=echo Booting from nand ...; " \
50                 "run nandargs; " \
51                 "nboot ${loadaddr} nand0 900000; " \
52                 "bootm ${loadaddr}\0"
53
54 #define CONFIG_EXTRA_ENV_SETTINGS \
55         "loadaddr=82000000\0" \
56         "console=ttyO0,115200n8\0" \
57         "rootfs_name=rootfs\0" \
58         "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
59         "bootscript=echo Running bootscript from mmc ...; " \
60                 "source ${loadaddr}\0" \
61         "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
62         MMCARGS \
63         NANDARGS
64
65 #define CONFIG_BOOTCOMMAND \
66         "mmc dev ${mmcdev}; if mmc rescan; then " \
67                 "if run loadbootscript; then " \
68                         "run bootscript; " \
69                 "else " \
70                         "if run loaduimage; then " \
71                                 "run mmcboot; " \
72                         "else run nandboot; " \
73                         "fi; " \
74                 "fi; " \
75         "else run nandboot; fi"
76 #endif /* CONFIG_SPL_BUILD */
77
78 #define CONFIG_TIMESTAMP
79 #define CONFIG_SYS_AUTOLOAD             "no"
80
81 /* Serial console configuration */
82 #define CONFIG_SERIAL1                  1       /* UART0 */
83
84 /* NS16550 Configuration */
85 #define CONFIG_SYS_NS16550_COM1         0x44e09000      /* UART0 */
86 #define CONFIG_SYS_NS16550_COM2         0x48022000      /* UART1 */
87
88 /* I2C Configuration */
89 #define CONFIG_SYS_I2C_EEPROM_ADDR      0x50    /* Main EEPROM */
90 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN  1
91 #define CONFIG_SYS_I2C_EEPROM_BUS       0
92
93 /* SPL */
94
95 /* Network. */
96 #define CONFIG_PHY_ATHEROS
97
98 /* NAND support */
99 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
100 #define CONFIG_SYS_NAND_PAGE_COUNT      (CONFIG_SYS_NAND_BLOCK_SIZE / \
101                                          CONFIG_SYS_NAND_PAGE_SIZE)
102 #define CONFIG_SYS_NAND_PAGE_SIZE       2048
103 #define CONFIG_SYS_NAND_OOBSIZE         64
104 #define CONFIG_SYS_NAND_BLOCK_SIZE      (128 * 1024)
105 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   NAND_LARGE_BADBLOCK_POS
106 #define CONFIG_SYS_NAND_ECCPOS          { 2, 3, 4, 5, 6, 7, 8, 9, \
107                                          10, 11, 12, 13, 14, 15, 16, 17, \
108                                          18, 19, 20, 21, 22, 23, 24, 25, \
109                                          26, 27, 28, 29, 30, 31, 32, 33, \
110                                          34, 35, 36, 37, 38, 39, 40, 41, \
111                                          42, 43, 44, 45, 46, 47, 48, 49, \
112                                          50, 51, 52, 53, 54, 55, 56, 57, }
113
114 #define CONFIG_SYS_NAND_ECCSIZE         512
115 #define CONFIG_SYS_NAND_ECCBYTES        14
116
117 #define CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_TEXT_BASE
118
119 #undef CONFIG_SYS_NAND_U_BOOT_OFFS
120 #define CONFIG_SYS_NAND_U_BOOT_OFFS     0x200000
121
122 #define CONFIG_ENV_OFFSET               0x300000 /* environment starts here */
123 #define CONFIG_SYS_ENV_SECT_SIZE        (128 << 10)     /* 128 KiB */
124 #define CONFIG_SYS_NAND_ONFI_DETECTION
125 #ifdef CONFIG_SPL_OS_BOOT
126 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x500000
127 #endif
128
129 /* GPIO pin + bank to pin ID mapping */
130 #define GPIO_PIN(_bank, _pin)           ((_bank << 5) + _pin)
131
132 /* Status LED */
133 /* Status LED polarity is inversed, so init it in the "off" state */
134
135 /* EEPROM */
136 #define CONFIG_ENV_EEPROM_IS_ON_I2C
137 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN          1
138 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS       4
139 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS   5
140 #define CONFIG_SYS_EEPROM_SIZE                  256
141
142 #ifndef CONFIG_SPL_BUILD
143 /*
144  * Enable PCA9555 at I2C0-0x26.
145  * First select the I2C0 bus with "i2c dev 0", then use "pca953x" command.
146  */
147 #define CONFIG_PCA953X
148 #define CONFIG_SYS_I2C_PCA953X_ADDR     0x26
149 #define CONFIG_SYS_I2C_PCA953X_WIDTH    { {0x26, 16} }
150 #endif /* CONFIG_SPL_BUILD */
151
152 #endif  /* __CONFIG_CM_T335_H */
153