git.sur5r.net Git - u-boot/blob - include/configs/cm_t35.h

   1 /*
   2  * (C) Copyright 2011
   3  * CompuLab, Ltd.
   4  * Mike Rapoport <mike@compulab.co.il>
   5  * Igor Grinberg <grinberg@compulab.co.il>
   6  *
   7  * Based on omap3_beagle.h
   8  * (C) Copyright 2006-2008
   9  * Texas Instruments.
  10  * Richard Woodruff <r-woodruff2@ti.com>
  11  * Syed Mohammed Khasim <x0khasim@ti.com>
  12  *
  13  * Configuration settings for the CompuLab CM-T35 and CM-T3730 boards
  14  *
  15  * See file CREDITS for list of people who contributed to this
  16  * project.
  17  *
  18  * This program is free software; you can redistribute it and/or
  19  * modify it under the terms of the GNU General Public License as
  20  * published by the Free Software Foundation; either version 2 of
  21  * the License, or (at your option) any later version.
  22  *
  23  * This program is distributed in the hope that it will be useful,
  24  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  25  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  26  * GNU General Public License for more details.
  27  *
  28  * You should have received a copy of the GNU General Public License
  29  * along with this program; if not, write to the Free Software
  30  * Foundation, Inc.
  31  */
  32
  33 #ifndef __CONFIG_H
  34 #define __CONFIG_H
  35
  36 /*
  37  * High Level Configuration Options
  38  */
  39 #define CONFIG_OMAP             1       /* in a TI OMAP core */
  40 #define CONFIG_OMAP34XX         1       /* which is a 34XX */
  41 #define CONFIG_CM_T3X           1       /* working with CM-T35 and CM-T3730 */
  42
  43 #define CONFIG_SYS_TEXT_BASE    0x80008000
  44
  45 #define CONFIG_SDRC     /* The chip has SDRC controller */
  46
  47 #include <asm/arch/cpu.h>               /* get chip and board defs */
  48 #include <asm/arch/omap3.h>
  49
  50 /*
  51  * Display CPU and Board information
  52  */
  53 #define CONFIG_DISPLAY_CPUINFO          1
  54 #define CONFIG_DISPLAY_BOARDINFO        1
  55
  56 /* Clock Defines */
  57 #define V_OSCK                  26000000        /* Clock output from T2 */
  58 #define V_SCLK                  (V_OSCK >> 1)
  59
  60 #undef CONFIG_USE_IRQ                           /* no support for IRQs */
  61 #define CONFIG_MISC_INIT_R
  62
  63 #define CONFIG_OF_LIBFDT                1
  64 /*
  65  * The early kernel mapping on ARM currently only maps from the base of DRAM
  66  * to the end of the kernel image.  The kernel is loaded at DRAM base + 0x8000.
  67  * The early kernel pagetable uses DRAM base + 0x4000 to DRAM base + 0x8000,
  68  * so that leaves DRAM base to DRAM base + 0x4000 available.
  69  */
  70 #define CONFIG_SYS_BOOTMAPSZ            0x4000
  71
  72 #define CONFIG_CMDLINE_TAG              1       /* enable passing of ATAGs */
  73 #define CONFIG_SETUP_MEMORY_TAGS        1
  74 #define CONFIG_INITRD_TAG               1
  75 #define CONFIG_REVISION_TAG             1
  76
  77 /*
  78  * Size of malloc() pool
  79  */
  80 #define CONFIG_ENV_SIZE                 (128 << 10)     /* 128 KiB */
  81                                                 /* Sector */
  82 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + (128 << 10))
  83
  84 /*
  85  * Hardware drivers
  86  */
  87
  88 /*
  89  * NS16550 Configuration
  90  */
  91 #define V_NS16550_CLK                   48000000        /* 48MHz (APLL96/2) */
  92
  93 #define CONFIG_SYS_NS16550
  94 #define CONFIG_SYS_NS16550_SERIAL
  95 #define CONFIG_SYS_NS16550_REG_SIZE     (-4)
  96 #define CONFIG_SYS_NS16550_CLK          V_NS16550_CLK
  97
  98 /*
  99  * select serial console configuration
 100  */
 101 #define CONFIG_CONS_INDEX               3
 102 #define CONFIG_SYS_NS16550_COM3         OMAP34XX_UART3
 103 #define CONFIG_SERIAL3                  3       /* UART3 */
 104
 105 /* allow to overwrite serial and ethaddr */
 106 #define CONFIG_ENV_OVERWRITE
 107 #define CONFIG_BAUDRATE                 115200
 108 #define CONFIG_SYS_BAUDRATE_TABLE       {4800, 9600, 19200, 38400, 57600,\
 109                                         115200}
 110 #define CONFIG_GENERIC_MMC              1
 111 #define CONFIG_MMC                      1
 112 #define CONFIG_OMAP_HSMMC               1
 113 #define CONFIG_DOS_PARTITION            1
 114
 115 /* USB */
 116 #define CONFIG_MUSB_UDC                 1
 117 #define CONFIG_USB_OMAP3                1
 118 #define CONFIG_TWL4030_USB              1
 119
 120 /* USB device configuration */
 121 #define CONFIG_USB_DEVICE               1
 122 #define CONFIG_USB_TTY                  1
 123 #define CONFIG_SYS_CONSOLE_IS_IN_ENV    1
 124
 125 /* commands to include */
 126 #include <config_cmd_default.h>
 127
 128 #define CONFIG_CMD_CACHE
 129 #define CONFIG_CMD_EXT2         /* EXT2 Support                 */
 130 #define CONFIG_CMD_FAT          /* FAT support                  */
 131 #define CONFIG_CMD_JFFS2        /* JFFS2 Support                */
 132 #define CONFIG_CMD_MTDPARTS     /* Enable MTD parts commands */
 133 #define CONFIG_MTD_DEVICE       /* needed for mtdparts commands */
 134 #define MTDIDS_DEFAULT                  "nand0=nand"
 135 #define MTDPARTS_DEFAULT                "mtdparts=nand:512k(x-loader),"\
 136                                         "1920k(u-boot),128k(u-boot-env),"\
 137                                         "4m(kernel),-(fs)"
 138
 139 #define CONFIG_CMD_I2C          /* I2C serial bus support       */
 140 #define CONFIG_CMD_MMC          /* MMC support                  */
 141 #define CONFIG_CMD_NAND         /* NAND support                 */
 142 #define CONFIG_CMD_DHCP
 143 #define CONFIG_CMD_PING
 144
 145 #undef CONFIG_CMD_FLASH         /* flinfo, erase, protect       */
 146 #undef CONFIG_CMD_FPGA          /* FPGA configuration Support   */
 147 #undef CONFIG_CMD_IMLS          /* List all found images        */
 148
 149 #define CONFIG_SYS_NO_FLASH
 150 #define CONFIG_HARD_I2C                 1
 151 #define CONFIG_SYS_I2C_SPEED            100000
 152 #define CONFIG_SYS_I2C_SLAVE            1
 153 #define CONFIG_SYS_I2C_BUS              0
 154 #define CONFIG_SYS_I2C_BUS_SELECT       1
 155 #define CONFIG_DRIVER_OMAP34XX_I2C      1
 156
 157 /*
 158  * TWL4030
 159  */
 160 #define CONFIG_TWL4030_POWER            1
 161 #define CONFIG_TWL4030_LED              1
 162
 163 /*
 164  * Board NAND Info.
 165  */
 166 #define CONFIG_SYS_NAND_QUIET_TEST      1
 167 #define CONFIG_NAND_OMAP_GPMC
 168 #define CONFIG_SYS_NAND_ADDR            NAND_BASE       /* physical address */
 169                                                         /* to access nand */
 170 #define CONFIG_SYS_NAND_BASE            NAND_BASE       /* physical address */
 171                                                         /* to access nand at */
 172                                                         /* CS0 */
 173 #define GPMC_NAND_ECC_LP_x16_LAYOUT     1
 174
 175 #define CONFIG_SYS_MAX_NAND_DEVICE      1               /* Max number of NAND */
 176                                                         /* devices */
 177 #define CONFIG_JFFS2_NAND
 178 /* nand device jffs2 lives on */
 179 #define CONFIG_JFFS2_DEV                "nand0"
 180 /* start of jffs2 partition */
 181 #define CONFIG_JFFS2_PART_OFFSET        0x680000
 182 #define CONFIG_JFFS2_PART_SIZE          0xf980000       /* size of jffs2 */
 183                                                         /* partition */
 184
 185 /* Environment information */
 186 #define CONFIG_BOOTDELAY                10
 187
 188 #define CONFIG_EXTRA_ENV_SETTINGS \
 189         "loadaddr=0x82000000\0" \
 190         "usbtty=cdc_acm\0" \
 191         "console=ttyS2,115200n8\0" \
 192         "mpurate=500\0" \
 193         "vram=12M\0" \
 194         "dvimode=1024x768MR-16@60\0" \
 195         "defaultdisplay=dvi\0" \
 196         "mmcdev=0\0" \
 197         "mmcroot=/dev/mmcblk0p2 rw\0" \
 198         "mmcrootfstype=ext3 rootwait\0" \
 199         "nandroot=/dev/mtdblock4 rw\0" \
 200         "nandrootfstype=jffs2\0" \
 201         "mmcargs=setenv bootargs console=${console} " \
 202                 "mpurate=${mpurate} " \
 203                 "vram=${vram} " \
 204                 "omapfb.mode=dvi:${dvimode} " \
 205                 "omapfb.debug=y " \
 206                 "omapdss.def_disp=${defaultdisplay} " \
 207                 "root=${mmcroot} " \
 208                 "rootfstype=${mmcrootfstype}\0" \
 209         "nandargs=setenv bootargs console=${console} " \
 210                 "mpurate=${mpurate} " \
 211                 "vram=${vram} " \
 212                 "omapfb.mode=dvi:${dvimode} " \
 213                 "omapfb.debug=y " \
 214                 "omapdss.def_disp=${defaultdisplay} " \
 215                 "root=${nandroot} " \
 216                 "rootfstype=${nandrootfstype}\0" \
 217         "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
 218         "bootscript=echo Running bootscript from mmc ...; " \
 219                 "source ${loadaddr}\0" \
 220         "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
 221         "mmcboot=echo Booting from mmc ...; " \
 222                 "run mmcargs; " \
 223                 "bootm ${loadaddr}\0" \
 224         "nandboot=echo Booting from nand ...; " \
 225                 "run nandargs; " \
 226                 "nand read ${loadaddr} 280000 400000; " \
 227                 "bootm ${loadaddr}\0" \
 228
 229 #define CONFIG_BOOTCOMMAND \
 230         "if mmc rescan ${mmcdev}; then " \
 231                 "if run loadbootscript; then " \
 232                         "run bootscript; " \
 233                 "else " \
 234                         "if run loaduimage; then " \
 235                                 "run mmcboot; " \
 236                         "else run nandboot; " \
 237                         "fi; " \
 238                 "fi; " \
 239         "else run nandboot; fi"
 240
 241 /*
 242  * Miscellaneous configurable options
 243  */
 244 #define CONFIG_AUTO_COMPLETE
 245 #define CONFIG_CMDLINE_EDITING
 246 #define CONFIG_TIMESTAMP
 247 #define CONFIG_SYS_AUTOLOAD     "no"
 248 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
 249 #define CONFIG_SYS_HUSH_PARSER          /* use "hush" command parser */
 250 #define CONFIG_SYS_PROMPT_HUSH_PS2      "> "
 251 #define CONFIG_SYS_PROMPT               "CM-T3x # "
 252 #define CONFIG_SYS_CBSIZE               256     /* Console I/O Buffer Size */
 253 /* Print Buffer Size */
 254 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
 255                                         sizeof(CONFIG_SYS_PROMPT) + 16)
 256 #define CONFIG_SYS_MAXARGS              16      /* max number of command args */
 257 /* Boot Argument Buffer Size */
 258 #define CONFIG_SYS_BARGSIZE             (CONFIG_SYS_CBSIZE)
 259
 260 #define CONFIG_SYS_MEMTEST_START        (OMAP34XX_SDRC_CS0)     /* memtest */
 261                                                                 /* works on */
 262 #define CONFIG_SYS_MEMTEST_END          (OMAP34XX_SDRC_CS0 + \
 263                                         0x01F00000) /* 31MB */
 264
 265 #define CONFIG_SYS_LOAD_ADDR            (OMAP34XX_SDRC_CS0)     /* default */
 266                                                         /* load address */
 267
 268 /*
 269  * OMAP3 has 12 GP timers, they can be driven by the system clock
 270  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
 271  * This rate is divided by a local divisor.
 272  */
 273 #define CONFIG_SYS_TIMERBASE            (OMAP34XX_GPT2)
 274 #define CONFIG_SYS_PTV                  2       /* Divisor: 2^(PTV+1) => 8 */
 275 #define CONFIG_SYS_HZ                   1000
 276
 277 /*-----------------------------------------------------------------------
 278  * Stack sizes
 279  *
 280  * The stack sizes are set up in start.S using the settings below
 281  */
 282 #define CONFIG_STACKSIZE        (128 << 10)     /* regular stack 128 KiB */
 283
 284 /*-----------------------------------------------------------------------
 285  * Physical Memory Map
 286  */
 287 #define CONFIG_NR_DRAM_BANKS    1       /* CS1 is never populated */
 288 #define PHYS_SDRAM_1            OMAP34XX_SDRC_CS0
 289 #define PHYS_SDRAM_1_SIZE       (32 << 20)      /* at least 32 MiB */
 290
 291 /*-----------------------------------------------------------------------
 292  * FLASH and environment organization
 293  */
 294
 295 /* **** PISMO SUPPORT *** */
 296
 297 /* Configure the PISMO */
 298 #define PISMO1_NAND_SIZE                GPMC_SIZE_128M
 299 #define PISMO1_ONEN_SIZE                GPMC_SIZE_128M
 300
 301 #define CONFIG_SYS_MONITOR_LEN          (256 << 10)     /* Reserve 2 sectors */
 302
 303 #if defined(CONFIG_CMD_NAND)
 304 #define CONFIG_SYS_FLASH_BASE           PISMO1_NAND_BASE
 305 #endif
 306
 307 /* Monitor at start of flash */
 308 #define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_FLASH_BASE
 309 #define CONFIG_SYS_ONENAND_BASE         ONENAND_MAP
 310
 311 #define CONFIG_ENV_IS_IN_NAND           1
 312 #define ONENAND_ENV_OFFSET              0x260000 /* environment starts here */
 313 #define SMNAND_ENV_OFFSET               0x260000 /* environment starts here */
 314
 315 #define CONFIG_SYS_ENV_SECT_SIZE        (128 << 10)     /* 128 KiB */
 316 #define CONFIG_ENV_OFFSET               SMNAND_ENV_OFFSET
 317 #define CONFIG_ENV_ADDR                 SMNAND_ENV_OFFSET
 318
 319 #if defined(CONFIG_CMD_NET)
 320 #define CONFIG_SMC911X
 321 #define CONFIG_SMC911X_32_BIT
 322 #define CM_T3X_SMC911X_BASE     0x2C000000
 323 #define SB_T35_SMC911X_BASE     (CM_T3X_SMC911X_BASE + (16 << 20))
 324 #define CONFIG_SMC911X_BASE     CM_T3X_SMC911X_BASE
 325 #endif /* (CONFIG_CMD_NET) */
 326
 327 /* additions for new relocation code, must be added to all boards */
 328 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
 329 #define CONFIG_SYS_INIT_RAM_ADDR        0x4020f800
 330 #define CONFIG_SYS_INIT_RAM_SIZE        0x800
 331 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INIT_RAM_ADDR +     \
 332                                          CONFIG_SYS_INIT_RAM_SIZE -     \
 333                                          GENERATED_GBL_DATA_SIZE)
 334
 335 /* Status LED */
 336 #define CONFIG_STATUS_LED               1 /* Status LED enabled */
 337 #define CONFIG_BOARD_SPECIFIC_LED       1
 338 #define STATUS_LED_GREEN                0
 339 #define STATUS_LED_BIT                  STATUS_LED_GREEN
 340 #define STATUS_LED_STATE                STATUS_LED_ON
 341 #define STATUS_LED_PERIOD               (CONFIG_SYS_HZ / 2)
 342 #define STATUS_LED_BOOT                 STATUS_LED_BIT
 343 #define GREEN_LED_GPIO                  186 /* CM-T35 Green LED is GPIO186 */
 344
 345 /* GPIO banks */
 346 #ifdef CONFIG_STATUS_LED
 347 #define CONFIG_OMAP3_GPIO_6             1 /* GPIO186 is in GPIO bank 6  */
 348 #endif
 349
 350 #endif /* __CONFIG_H */