2 * (C) Copyright 2013 CompuLab, Ltd.
3 * Author: Igor Grinberg <grinberg@compulab.co.il>
5 * Configuration settings for the CompuLab CM-T3517 board
7 * SPDX-License-Identifier: GPL-2.0+
14 * High Level Configuration Options
16 #define CONFIG_OMAP /* in a TI OMAP core */
17 #define CONFIG_CM_T3517 /* working with CM-T3517 */
18 /* Common ARM Erratas */
19 #define CONFIG_ARM_ERRATA_454179
20 #define CONFIG_ARM_ERRATA_430973
21 #define CONFIG_ARM_ERRATA_621766
23 #define CONFIG_SYS_TEXT_BASE 0x80008000
26 * This is needed for the DMA stuff.
27 * Although the default iss 64, we still define it
28 * to be on the safe side once the default is changed.
31 #define CONFIG_EMIF4 /* The chip has EMIF4 controller */
33 #include <asm/arch/cpu.h> /* get chip and board defs */
34 #include <asm/arch/omap.h>
36 #define CONFIG_MACH_TYPE MACH_TYPE_CM_T3517
39 #define V_OSCK 26000000 /* Clock output from T2 */
40 #define V_SCLK (V_OSCK >> 1)
42 #define CONFIG_MISC_INIT_R
45 * The early kernel mapping on ARM currently only maps from the base of DRAM
46 * to the end of the kernel image. The kernel is loaded at DRAM base + 0x8000.
47 * The early kernel pagetable uses DRAM base + 0x4000 to DRAM base + 0x8000,
48 * so that leaves DRAM base to DRAM base + 0x4000 available.
50 #define CONFIG_SYS_BOOTMAPSZ 0x4000
52 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
53 #define CONFIG_SETUP_MEMORY_TAGS
54 #define CONFIG_INITRD_TAG
55 #define CONFIG_REVISION_TAG
56 #define CONFIG_SERIAL_TAG
59 * Size of malloc() pool
61 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
62 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
69 * NS16550 Configuration
71 #define CONFIG_SYS_NS16550_SERIAL
72 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
73 #define CONFIG_SYS_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
76 * select serial console configuration
78 #define CONFIG_CONS_INDEX 3
79 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
80 #define CONFIG_SERIAL3 3 /* UART3 */
82 /* allow to overwrite serial and ethaddr */
83 #define CONFIG_ENV_OVERWRITE
84 #define CONFIG_BAUDRATE 115200
85 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
88 #define CONFIG_OMAP_GPIO
90 #define CONFIG_GENERIC_MMC
92 #define CONFIG_OMAP_HSMMC
93 #define CONFIG_DOS_PARTITION
96 #define CONFIG_USB_MUSB_AM35X
98 #ifndef CONFIG_USB_MUSB_AM35X
99 #define CONFIG_USB_OMAP3
100 #define CONFIG_USB_EHCI
101 #define CONFIG_USB_EHCI_OMAP
102 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 146
103 #define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO 147
104 #else /* !CONFIG_USB_MUSB_AM35X */
105 #define CONFIG_USB_MUSB_PIO_ONLY
106 #endif /* CONFIG_USB_MUSB_AM35X */
108 /* commands to include */
109 #define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */
110 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
111 #define CONFIG_MTD_PARTITIONS
112 #define MTDIDS_DEFAULT "nand0=nand"
113 #define MTDPARTS_DEFAULT "mtdparts=nand:512k(x-loader),"\
114 "1920k(u-boot),256k(u-boot-env),"\
117 #define CONFIG_CMD_NAND /* NAND support */
119 #define CONFIG_SYS_NO_FLASH
120 #define CONFIG_SYS_I2C
121 #define CONFIG_SYS_OMAP24_I2C_SPEED 400000
122 #define CONFIG_SYS_OMAP24_I2C_SLAVE 1
123 #define CONFIG_SYS_I2C_OMAP34XX
124 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
125 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
126 #define CONFIG_SYS_I2C_EEPROM_BUS 0
127 #define CONFIG_I2C_MULTI_BUS
132 #define CONFIG_NAND_OMAP_GPMC
133 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
135 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
136 /* to access nand at */
138 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
141 /* Environment information */
142 #define CONFIG_EXTRA_ENV_SETTINGS \
143 "loadaddr=0x82000000\0" \
144 "baudrate=115200\0" \
145 "console=ttyO2,115200n8\0" \
149 "dvimode=1024x768MR-16@60\0" \
150 "defaultdisplay=dvi\0" \
152 "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \
153 "mmcrootfstype=ext4\0" \
154 "nandroot=/dev/mtdblock4 rw\0" \
155 "nandrootfstype=ubifs\0" \
156 "mmcargs=setenv bootargs console=${console} " \
157 "mpurate=${mpurate} " \
159 "omapfb.mode=dvi:${dvimode} " \
160 "omapdss.def_disp=${defaultdisplay} " \
162 "rootfstype=${mmcrootfstype}\0" \
163 "nandargs=setenv bootargs console=${console} " \
164 "mpurate=${mpurate} " \
166 "omapfb.mode=dvi:${dvimode} " \
167 "omapdss.def_disp=${defaultdisplay} " \
168 "root=${nandroot} " \
169 "rootfstype=${nandrootfstype}\0" \
170 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
171 "bootscript=echo Running bootscript from mmc ...; " \
172 "source ${loadaddr}\0" \
173 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
174 "mmcboot=echo Booting from mmc ...; " \
176 "bootm ${loadaddr}\0" \
177 "nandboot=echo Booting from nand ...; " \
179 "nand read ${loadaddr} 2a0000 400000; " \
180 "bootm ${loadaddr}\0" \
182 #define CONFIG_BOOTCOMMAND \
183 "mmc dev ${mmcdev}; if mmc rescan; then " \
184 "if run loadbootscript; then " \
187 "if run loaduimage; then " \
189 "else run nandboot; " \
192 "else run nandboot; fi"
195 * Miscellaneous configurable options
197 #define CONFIG_AUTO_COMPLETE
198 #define CONFIG_CMDLINE_EDITING
199 #define CONFIG_TIMESTAMP
200 #define CONFIG_SYS_AUTOLOAD "no"
201 #define CONFIG_SYS_LONGHELP /* undef to save memory */
202 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
203 /* Print Buffer Size */
204 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
205 sizeof(CONFIG_SYS_PROMPT) + 16)
206 #define CONFIG_SYS_MAXARGS 32 /* max number of command args */
207 /* Boot Argument Buffer Size */
208 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
210 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0 + 0x02000000)
213 * AM3517 has 12 GP timers, they can be driven by the system clock
214 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
215 * This rate is divided by a local divisor.
217 #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
218 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
219 #define CONFIG_SYS_HZ 1000
221 /*-----------------------------------------------------------------------
222 * Physical Memory Map
224 #define CONFIG_NR_DRAM_BANKS 1 /* CM-T3517 DRAM is only on CS0 */
225 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
226 #define CONFIG_SYS_CS0_SIZE (256 << 20)
228 /*-----------------------------------------------------------------------
229 * FLASH and environment organization
232 /* **** PISMO SUPPORT *** */
233 /* Monitor at start of flash */
234 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
235 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
237 #define CONFIG_ENV_IS_IN_NAND
238 #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
239 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
240 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
242 #if defined(CONFIG_CMD_NET)
243 #define CONFIG_DRIVER_TI_EMAC
244 #define CONFIG_DRIVER_TI_EMAC_USE_RMII
246 #define CONFIG_SMC911X
247 #define CONFIG_SMC911X_32_BIT
248 #define CONFIG_SMC911X_BASE (0x2C000000 + (16 << 20))
249 #define CONFIG_ARP_TIMEOUT 200UL
250 #define CONFIG_NET_RETRY_COUNT 5
251 #endif /* CONFIG_CMD_NET */
253 /* additions for new relocation code, must be added to all boards */
254 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
255 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
256 #define CONFIG_SYS_INIT_RAM_SIZE 0x800
257 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
258 CONFIG_SYS_INIT_RAM_SIZE - \
259 GENERATED_GBL_DATA_SIZE)
262 #define CONFIG_STATUS_LED /* Status LED enabled */
263 #define CONFIG_BOARD_SPECIFIC_LED
264 #define CONFIG_GPIO_LED
265 #define GREEN_LED_GPIO 186 /* CM-T3517 Green LED is GPIO186 */
266 #define GREEN_LED_DEV 0
267 #define STATUS_LED_BIT GREEN_LED_GPIO
268 #define STATUS_LED_STATE STATUS_LED_ON
269 #define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2)
270 #define STATUS_LED_BOOT GREEN_LED_DEV
273 #ifdef CONFIG_STATUS_LED
274 #define CONFIG_OMAP3_GPIO_6 /* GPIO186 is in GPIO bank 6 */
277 /* Display Configuration */
278 #define CONFIG_OMAP3_GPIO_2
279 #define CONFIG_OMAP3_GPIO_5
280 #define CONFIG_VIDEO_OMAP3
281 #define LCD_BPP LCD_COLOR16
283 #define CONFIG_SPLASH_SCREEN
284 #define CONFIG_SPLASHIMAGE_GUARD
285 #define CONFIG_CMD_BMP
286 #define CONFIG_BMP_16BPP
287 #define CONFIG_SCF0403_LCD
289 #define CONFIG_OMAP3_SPI
292 #define CONFIG_CMD_EEPROM
293 #define CONFIG_ENV_EEPROM_IS_ON_I2C
294 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
295 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4
296 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
297 #define CONFIG_SYS_EEPROM_SIZE 256
299 #define CONFIG_CMD_EEPROM_LAYOUT
300 #define CONFIG_EEPROM_LAYOUT_HELP_STRING "v1, v2, v3"
302 #endif /* __CONFIG_H */