2 * (C) Copyright 2013 CompuLab, Ltd.
3 * Author: Igor Grinberg <grinberg@compulab.co.il>
5 * Configuration settings for the CompuLab CM-T3517 board
7 * SPDX-License-Identifier: GPL-2.0+
13 #define CONFIG_SYS_CACHELINE_SIZE 64
16 * High Level Configuration Options
18 #define CONFIG_OMAP /* in a TI OMAP core */
19 #define CONFIG_CM_T3517 /* working with CM-T3517 */
20 #define CONFIG_OMAP_COMMON
21 /* Common ARM Erratas */
22 #define CONFIG_ARM_ERRATA_454179
23 #define CONFIG_ARM_ERRATA_430973
24 #define CONFIG_ARM_ERRATA_621766
26 #define CONFIG_SYS_TEXT_BASE 0x80008000
29 * This is needed for the DMA stuff.
30 * Although the default iss 64, we still define it
31 * to be on the safe side once the default is changed.
33 #define CONFIG_SYS_CACHELINE_SIZE 64
35 #define CONFIG_EMIF4 /* The chip has EMIF4 controller */
37 #include <asm/arch/cpu.h> /* get chip and board defs */
38 #include <asm/arch/omap.h>
40 #define CONFIG_MACH_TYPE MACH_TYPE_CM_T3517
43 * Display CPU and Board information
45 #define CONFIG_DISPLAY_CPUINFO
46 #define CONFIG_DISPLAY_BOARDINFO
49 #define V_OSCK 26000000 /* Clock output from T2 */
50 #define V_SCLK (V_OSCK >> 1)
52 #define CONFIG_MISC_INIT_R
55 * The early kernel mapping on ARM currently only maps from the base of DRAM
56 * to the end of the kernel image. The kernel is loaded at DRAM base + 0x8000.
57 * The early kernel pagetable uses DRAM base + 0x4000 to DRAM base + 0x8000,
58 * so that leaves DRAM base to DRAM base + 0x4000 available.
60 #define CONFIG_SYS_BOOTMAPSZ 0x4000
62 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
63 #define CONFIG_SETUP_MEMORY_TAGS
64 #define CONFIG_INITRD_TAG
65 #define CONFIG_REVISION_TAG
66 #define CONFIG_SERIAL_TAG
69 * Size of malloc() pool
71 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
72 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
79 * NS16550 Configuration
81 #define CONFIG_SYS_NS16550_SERIAL
82 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
83 #define CONFIG_SYS_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
86 * select serial console configuration
88 #define CONFIG_CONS_INDEX 3
89 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
90 #define CONFIG_SERIAL3 3 /* UART3 */
91 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
93 /* allow to overwrite serial and ethaddr */
94 #define CONFIG_ENV_OVERWRITE
95 #define CONFIG_BAUDRATE 115200
96 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
99 #define CONFIG_OMAP_GPIO
101 #define CONFIG_GENERIC_MMC
103 #define CONFIG_OMAP_HSMMC
104 #define CONFIG_DOS_PARTITION
107 #define CONFIG_USB_MUSB_AM35X
109 #ifndef CONFIG_USB_MUSB_AM35X
110 #define CONFIG_USB_OMAP3
111 #define CONFIG_USB_EHCI
112 #define CONFIG_USB_EHCI_OMAP
113 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 146
114 #define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO 147
115 #else /* !CONFIG_USB_MUSB_AM35X */
116 #define CONFIG_USB_MUSB_PIO_ONLY
117 #endif /* CONFIG_USB_MUSB_AM35X */
119 #define CONFIG_USB_STORAGE
121 /* commands to include */
122 #define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */
123 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
124 #define CONFIG_MTD_PARTITIONS
125 #define MTDIDS_DEFAULT "nand0=nand"
126 #define MTDPARTS_DEFAULT "mtdparts=nand:512k(x-loader),"\
127 "1920k(u-boot),256k(u-boot-env),"\
130 #define CONFIG_CMD_NAND /* NAND support */
132 #define CONFIG_SYS_NO_FLASH
133 #define CONFIG_SYS_I2C
134 #define CONFIG_SYS_OMAP24_I2C_SPEED 400000
135 #define CONFIG_SYS_OMAP24_I2C_SLAVE 1
136 #define CONFIG_SYS_I2C_OMAP34XX
137 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
138 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
139 #define CONFIG_SYS_I2C_EEPROM_BUS 0
140 #define CONFIG_I2C_MULTI_BUS
145 #define CONFIG_NAND_OMAP_GPMC
146 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
148 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
149 /* to access nand at */
151 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
154 /* Environment information */
155 #define CONFIG_ZERO_BOOTDELAY_CHECK
157 #define CONFIG_EXTRA_ENV_SETTINGS \
158 "loadaddr=0x82000000\0" \
159 "baudrate=115200\0" \
160 "console=ttyO2,115200n8\0" \
164 "dvimode=1024x768MR-16@60\0" \
165 "defaultdisplay=dvi\0" \
167 "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \
168 "mmcrootfstype=ext4\0" \
169 "nandroot=/dev/mtdblock4 rw\0" \
170 "nandrootfstype=ubifs\0" \
171 "mmcargs=setenv bootargs console=${console} " \
172 "mpurate=${mpurate} " \
174 "omapfb.mode=dvi:${dvimode} " \
175 "omapdss.def_disp=${defaultdisplay} " \
177 "rootfstype=${mmcrootfstype}\0" \
178 "nandargs=setenv bootargs console=${console} " \
179 "mpurate=${mpurate} " \
181 "omapfb.mode=dvi:${dvimode} " \
182 "omapdss.def_disp=${defaultdisplay} " \
183 "root=${nandroot} " \
184 "rootfstype=${nandrootfstype}\0" \
185 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
186 "bootscript=echo Running bootscript from mmc ...; " \
187 "source ${loadaddr}\0" \
188 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
189 "mmcboot=echo Booting from mmc ...; " \
191 "bootm ${loadaddr}\0" \
192 "nandboot=echo Booting from nand ...; " \
194 "nand read ${loadaddr} 2a0000 400000; " \
195 "bootm ${loadaddr}\0" \
197 #define CONFIG_BOOTCOMMAND \
198 "mmc dev ${mmcdev}; if mmc rescan; then " \
199 "if run loadbootscript; then " \
202 "if run loaduimage; then " \
204 "else run nandboot; " \
207 "else run nandboot; fi"
210 * Miscellaneous configurable options
212 #define CONFIG_AUTO_COMPLETE
213 #define CONFIG_CMDLINE_EDITING
214 #define CONFIG_TIMESTAMP
215 #define CONFIG_SYS_AUTOLOAD "no"
216 #define CONFIG_SYS_LONGHELP /* undef to save memory */
217 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
218 /* Print Buffer Size */
219 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
220 sizeof(CONFIG_SYS_PROMPT) + 16)
221 #define CONFIG_SYS_MAXARGS 32 /* max number of command args */
222 /* Boot Argument Buffer Size */
223 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
225 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0 + 0x02000000)
228 * AM3517 has 12 GP timers, they can be driven by the system clock
229 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
230 * This rate is divided by a local divisor.
232 #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
233 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
234 #define CONFIG_SYS_HZ 1000
236 /*-----------------------------------------------------------------------
237 * Physical Memory Map
239 #define CONFIG_NR_DRAM_BANKS 1 /* CM-T3517 DRAM is only on CS0 */
240 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
241 #define CONFIG_SYS_CS0_SIZE (256 << 20)
243 /*-----------------------------------------------------------------------
244 * FLASH and environment organization
247 /* **** PISMO SUPPORT *** */
248 /* Monitor at start of flash */
249 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
250 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
252 #define CONFIG_ENV_IS_IN_NAND
253 #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
254 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
255 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
257 #if defined(CONFIG_CMD_NET)
258 #define CONFIG_DRIVER_TI_EMAC
259 #define CONFIG_DRIVER_TI_EMAC_USE_RMII
261 #define CONFIG_SMC911X
262 #define CONFIG_SMC911X_32_BIT
263 #define CONFIG_SMC911X_BASE (0x2C000000 + (16 << 20))
264 #define CONFIG_ARP_TIMEOUT 200UL
265 #define CONFIG_NET_RETRY_COUNT 5
266 #endif /* CONFIG_CMD_NET */
268 /* additions for new relocation code, must be added to all boards */
269 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
270 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
271 #define CONFIG_SYS_INIT_RAM_SIZE 0x800
272 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
273 CONFIG_SYS_INIT_RAM_SIZE - \
274 GENERATED_GBL_DATA_SIZE)
277 #define CONFIG_STATUS_LED /* Status LED enabled */
278 #define CONFIG_BOARD_SPECIFIC_LED
279 #define CONFIG_GPIO_LED
280 #define GREEN_LED_GPIO 186 /* CM-T3517 Green LED is GPIO186 */
281 #define GREEN_LED_DEV 0
282 #define STATUS_LED_BIT GREEN_LED_GPIO
283 #define STATUS_LED_STATE STATUS_LED_ON
284 #define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2)
285 #define STATUS_LED_BOOT GREEN_LED_DEV
288 #ifdef CONFIG_STATUS_LED
289 #define CONFIG_OMAP3_GPIO_6 /* GPIO186 is in GPIO bank 6 */
292 /* Display Configuration */
293 #define CONFIG_OMAP3_GPIO_2
294 #define CONFIG_OMAP3_GPIO_5
295 #define CONFIG_VIDEO_OMAP3
296 #define LCD_BPP LCD_COLOR16
299 #define CONFIG_SPLASH_SCREEN
300 #define CONFIG_SPLASHIMAGE_GUARD
301 #define CONFIG_CMD_BMP
302 #define CONFIG_BMP_16BPP
303 #define CONFIG_SCF0403_LCD
305 #define CONFIG_OMAP3_SPI
308 #define CONFIG_CMD_EEPROM
309 #define CONFIG_ENV_EEPROM_IS_ON_I2C
310 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
311 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4
312 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
313 #define CONFIG_SYS_EEPROM_SIZE 256
315 #define CONFIG_CMD_EEPROM_LAYOUT
316 #define CONFIG_EEPROM_LAYOUT_HELP_STRING "v1, v2, v3"
318 #endif /* __CONFIG_H */