2 * Configuation settings for the Sentec Cobra Board.
4 * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de>
6 * SPDX-License-Identifier: GPL-2.0+
10 * Version: U-Boot 1.0.0 - initial release for Sentec COBRA5272 board
12 * Author: Florian Schlote
14 * For a description of configuration options please refer also to the
15 * general u-boot-1.x.x/README file
20 * board/config.h - configuration options, board specific
24 #ifndef _CONFIG_COBRA5272_H
25 #define _CONFIG_COBRA5272_H
28 * Defines processor clock - important for correct timings concerning serial
33 #define CONFIG_SYS_CLK 66000000
34 #define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */
37 * Enable use of Ethernet
42 /* Enable Dma Timer */
46 * Define baudrate for UART1 (console output, tftp, ...)
47 * default value of CONFIG_BAUDRATE for Sentec board: 19200 baud
48 * CONFIG_SYS_BAUDRATE_TABLE defines values that can be selected in u-boot command
53 #define CONFIG_MCFUART
54 #define CONFIG_SYS_UART_PORT (0)
57 * set "#if 0" to "#if 1" if (Hardware)-WATCHDOG should be enabled & change
58 * timeout acc. to your needs
59 * #define CONFIG_WATCHDOG_TIMEOUT x , x is timeout in milliseconds, e. g. 10000
65 #define CONFIG_WATCHDOG
66 #define CONFIG_WATCHDOG_TIMEOUT 10000 /* timeout in milliseconds */
70 * CONFIG_MONITOR_IS_IN_RAM defines if u-boot is started from a different
71 * bootloader residing in flash ('chainloading'); if you want to use
72 * chainloading or want to compile a u-boot binary that can be loaded into
75 * You will need a first stage bootloader then, e. g. colilo or a working BDM
76 * cable (Background Debug Mode)
78 * Setting #if 0: u-boot will start from flash and relocate itself to RAM
80 * Please do not forget to modify the setting of CONFIG_SYS_TEXT_BASE
81 * in board/cobra5272/config.mk accordingly (#if 0: 0xffe00000; #if 1: 0x20000)
87 #define CONFIG_MONITOR_IS_IN_RAM /* monitor is started from a preloader */
91 * Configuration for environment
92 * Environment is embedded in u-boot in the second sector of the flash
96 #ifndef CONFIG_MONITOR_IS_IN_RAM
97 #define CONFIG_ENV_OFFSET 0x4000
98 #define CONFIG_ENV_SECT_SIZE 0x2000
100 #define CONFIG_ENV_ADDR 0xffe04000
101 #define CONFIG_ENV_SECT_SIZE 0x2000
104 #define LDS_BOARD_TEXT \
105 . = DEFINED(env_offset) ? env_offset : .; \
106 env/embedded.o(.text);
111 #define CONFIG_BOOTP_BOOTFILESIZE
112 #define CONFIG_BOOTP_BOOTPATH
113 #define CONFIG_BOOTP_GATEWAY
114 #define CONFIG_BOOTP_HOSTNAME
117 * Command line configuration.
121 # define CONFIG_MII 1
122 # define CONFIG_MII_INIT 1
123 # define CONFIG_SYS_DISCOVER_PHY
124 # define CONFIG_SYS_RX_ETH_BUFFER 8
125 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
127 # define CONFIG_SYS_FEC0_PINMUX 0
128 # define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE
129 # define MCFFEC_TOUT_LOOP 50000
130 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
131 # ifndef CONFIG_SYS_DISCOVER_PHY
132 # define FECDUPLEX FULL
133 # define FECSPEED _100BASET
135 # ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
136 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
138 # endif /* CONFIG_SYS_DISCOVER_PHY */
142 *-----------------------------------------------------------------------------
143 * Define user parameters that have to be customized most likely
144 *-----------------------------------------------------------------------------
147 /*AUTOBOOT settings - booting images automatically by u-boot after power on*/
149 /* The following settings will be contained in the environment block ; if you
150 want to use a neutral environment all those settings can be manually set in
151 u-boot: 'set' command */
155 #define CONFIG_BOOTCOMMAND "bootm 0xffe80000" /*Autoboto command, please
156 enter a valid image address in flash */
158 /* User network settings */
160 #define CONFIG_IPADDR 192.168.100.2 /* default board IP address */
161 #define CONFIG_SERVERIP 192.168.100.1 /* default tftp server IP address */
165 #define CONFIG_SYS_LOAD_ADDR 0x20000 /*Defines default RAM address
166 from which user programs will be started */
170 #define CONFIG_SYS_LONGHELP /* undef to save memory */
172 #if defined(CONFIG_CMD_KGDB)
173 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
175 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
177 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
178 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
179 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
182 *-----------------------------------------------------------------------------
183 * End of user parameters to be customized
184 *-----------------------------------------------------------------------------
188 * Defines memory range for test
192 #define CONFIG_SYS_MEMTEST_START 0x400
193 #define CONFIG_SYS_MEMTEST_END 0x380000
196 * Low Level Configuration Settings
197 * (address mappings, register initial values, etc.)
198 * You should know what you are doing if you make changes here.
203 * Base register address
207 #define CONFIG_SYS_MBAR 0x10000000 /* Register Base Addrs */
210 * System Conf. Reg. & System Protection Reg.
214 #define CONFIG_SYS_SCR 0x0003
215 #define CONFIG_SYS_SPR 0xffff
222 #define CONFIG_SYS_DISCOVER_PHY
223 #define CONFIG_SYS_ENET_BD_BASE 0x780000
225 /*-----------------------------------------------------------------------
226 * Definitions for initial stack pointer and data area (in internal SRAM)
228 #define CONFIG_SYS_INIT_RAM_ADDR 0x20000000
229 #define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in internal SRAM */
230 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
231 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
233 /*-----------------------------------------------------------------------
234 * Start addresses for the final memory configuration
235 * (Set up by the startup code)
236 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
238 #define CONFIG_SYS_SDRAM_BASE 0x00000000
241 *-------------------------------------------------------------------------
242 * RAM SIZE (is defined above)
243 *-----------------------------------------------------------------------
246 /* #define CONFIG_SYS_SDRAM_SIZE 16 */
249 *-----------------------------------------------------------------------
252 #define CONFIG_SYS_FLASH_BASE 0xffe00000
254 #ifdef CONFIG_MONITOR_IS_IN_RAM
255 #define CONFIG_SYS_MONITOR_BASE 0x20000
257 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
260 #define CONFIG_SYS_MONITOR_LEN 0x20000
261 #define CONFIG_SYS_MALLOC_LEN (256 << 10)
262 #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024
265 * For booting Linux, the board info and command line data
266 * have to be in the first 8 MB of memory, since this is
267 * the maximum mapped by the Linux kernel during initialization ??
269 #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
271 /*-----------------------------------------------------------------------
274 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
275 #define CONFIG_SYS_MAX_FLASH_SECT 11 /* max number of sectors on one chip */
276 #define CONFIG_SYS_FLASH_ERASE_TOUT 1000 /* flash timeout */
278 /*-----------------------------------------------------------------------
279 * Cache Configuration
281 #define CONFIG_SYS_CACHELINE_SIZE 16
283 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
284 CONFIG_SYS_INIT_RAM_SIZE - 8)
285 #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
286 CONFIG_SYS_INIT_RAM_SIZE - 4)
287 #define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI)
288 #define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \
289 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
290 CF_ACR_EN | CF_ACR_SM_ALL)
291 #define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CINV | \
292 CF_CACR_DISD | CF_CACR_INVI | \
293 CF_CACR_CEIB | CF_CACR_DCM | \
296 /*-----------------------------------------------------------------------
297 * Memory bank definitions
299 * Please refer also to Motorola Coldfire user manual - Chapter XXX
300 * <http://e-www.motorola.com/files/dsp/doc/ref_manual/MCF5272UM.pdf>
302 #define CONFIG_SYS_BR0_PRELIM 0xFFE00201
303 #define CONFIG_SYS_OR0_PRELIM 0xFFE00014
305 #define CONFIG_SYS_BR1_PRELIM 0
306 #define CONFIG_SYS_OR1_PRELIM 0
308 #define CONFIG_SYS_BR2_PRELIM 0
309 #define CONFIG_SYS_OR2_PRELIM 0
311 #define CONFIG_SYS_BR3_PRELIM 0
312 #define CONFIG_SYS_OR3_PRELIM 0
314 #define CONFIG_SYS_BR4_PRELIM 0
315 #define CONFIG_SYS_OR4_PRELIM 0
317 #define CONFIG_SYS_BR5_PRELIM 0
318 #define CONFIG_SYS_OR5_PRELIM 0
320 #define CONFIG_SYS_BR6_PRELIM 0
321 #define CONFIG_SYS_OR6_PRELIM 0
323 #define CONFIG_SYS_BR7_PRELIM 0x00000701
324 #define CONFIG_SYS_OR7_PRELIM 0xFF00007C
326 /*-----------------------------------------------------------------------
329 #define LED_STAT_0 0xffff /*all LEDs off*/
330 #define LED_STAT_1 0xfffe
331 #define LED_STAT_2 0xfffd
332 #define LED_STAT_3 0xfffb
333 #define LED_STAT_4 0xfff7
334 #define LED_STAT_5 0xffef
335 #define LED_STAT_6 0xffdf
336 #define LED_STAT_7 0xff00 /*all LEDs on*/
338 /*-----------------------------------------------------------------------
339 * Port configuration (GPIO)
341 #define CONFIG_SYS_PACNT 0x00000000 /* PortA control reg.: All pins are external
343 #define CONFIG_SYS_PADDR 0x00FF /* PortA direction reg.: PA7 to PA0 are outputs
344 (1^=output, 0^=input) */
345 #define CONFIG_SYS_PADAT LED_STAT_0 /* PortA value reg.: Turn all LED off */
346 #define CONFIG_SYS_PBCNT 0x55554155 /* PortB control reg.: Ethernet/UART
348 #define CONFIG_SYS_PBDDR 0x0000 /* PortB direction: All pins configured as inputs */
349 #define CONFIG_SYS_PBDAT 0x0000 /* PortB value reg. */
350 #define CONFIG_SYS_PDCNT 0x00000000 /* PortD control reg. */
352 #endif /* _CONFIG_COBRA5272_H */