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[u-boot] / include / configs / colibri_pxa270.h
1 /*
2  * Toradex Colibri PXA270 configuration file
3  *
4  * Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
5  * Copyright (C) 2015 Marcel Ziswiler <marcel@ziswiler.com>
6  *
7  * SPDX-License-Identifier:     GPL-2.0+
8  */
9
10 #ifndef __CONFIG_H
11 #define __CONFIG_H
12
13 /*
14  * High Level Board Configuration Options
15  */
16 #define CONFIG_CPU_PXA27X               1       /* Marvell PXA270 CPU */
17 #define CONFIG_SYS_GENERIC_BOARD
18 #define CONFIG_SYS_TEXT_BASE            0x0
19 /* Avoid overwriting factory configuration block */
20 #define CONFIG_BOARD_SIZE_LIMIT         0x40000
21
22 /*
23  * Environment settings
24  */
25 #define CONFIG_ENV_OVERWRITE
26 #define CONFIG_SYS_MALLOC_LEN           (128 * 1024)
27 #define CONFIG_ARCH_CPU_INIT
28 #define CONFIG_BOOTCOMMAND                                              \
29         "if fatload mmc 0 0xa0000000 uImage; then "                     \
30                 "bootm 0xa0000000; "                                    \
31         "fi; "                                                          \
32         "if usb reset && fatload usb 0 0xa0000000 uImage; then "        \
33                 "bootm 0xa0000000; "                                    \
34         "fi; "                                                          \
35         "bootm 0xc0000;"
36 #define CONFIG_BOOTARGS                 "console=tty0 console=ttyS0,115200"
37 #define CONFIG_TIMESTAMP
38 #define CONFIG_BOOTDELAY                2       /* Autoboot delay */
39 #define CONFIG_CMDLINE_TAG
40 #define CONFIG_SETUP_MEMORY_TAGS
41 #define CONFIG_LZMA                     /* LZMA compression support */
42 #define CONFIG_OF_LIBFDT
43
44 /*
45  * Serial Console Configuration
46  */
47 #define CONFIG_PXA_SERIAL
48 #define CONFIG_FFUART                   1
49 #define CONFIG_CONS_INDEX               3
50 #define CONFIG_BAUDRATE                 115200
51
52 /*
53  * Bootloader Components Configuration
54  */
55 #include <config_cmd_default.h>
56
57 #undef CONFIG_CMD_LOADB                 /* Both together */
58 #undef CONFIG_CMD_LOADS                 /* saves 10 KB */
59 #define CONFIG_CMD_NET
60 #define CONFIG_CMD_ENV
61 #undef  CONFIG_CMD_IMLS
62 #define CONFIG_CMD_MMC
63 #define CONFIG_CMD_USB
64 #define CONFIG_CMD_FLASH
65
66 /*
67  * Networking Configuration
68  */
69 #ifdef  CONFIG_CMD_NET
70 #define CONFIG_CMD_PING
71 #define CONFIG_CMD_DHCP
72
73 #define CONFIG_DRIVER_DM9000            1
74 #define CONFIG_DM9000_BASE              0x08000000
75 #define DM9000_IO                       (CONFIG_DM9000_BASE)
76 #define DM9000_DATA                     (CONFIG_DM9000_BASE + 4)
77 #define CONFIG_NET_RETRY_COUNT          10
78
79 #define CONFIG_BOOTP_BOOTFILESIZE
80 #define CONFIG_BOOTP_BOOTPATH
81 #define CONFIG_BOOTP_GATEWAY
82 #define CONFIG_BOOTP_HOSTNAME
83 #endif
84
85 /*
86  * HUSH Shell Configuration
87  */
88 #define CONFIG_SYS_HUSH_PARSER          1
89
90 #undef  CONFIG_SYS_LONGHELP             /* Saves 10 KB */
91 #ifdef  CONFIG_SYS_HUSH_PARSER
92 #define CONFIG_SYS_PROMPT               "$ "
93 #else
94 #endif
95 #define CONFIG_SYS_CBSIZE               256
96 #define CONFIG_SYS_PBSIZE               \
97         (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
98 #define CONFIG_SYS_MAXARGS              16
99 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
100 #define CONFIG_SYS_DEVICE_NULLDEV       1
101 #define CONFIG_CMDLINE_EDITING          1
102 #define CONFIG_AUTO_COMPLETE            1
103
104 /*
105  * Clock Configuration
106  */
107 #define CONFIG_SYS_CPUSPEED             0x290           /* 520MHz */
108
109 /*
110  * DRAM Map
111  */
112 #define CONFIG_NR_DRAM_BANKS            1               /* We have 1 bank of DRAM */
113 #define PHYS_SDRAM_1                    0xa0000000      /* SDRAM Bank #1 */
114 #define PHYS_SDRAM_1_SIZE               0x04000000      /* 64 MB */
115
116 #define CONFIG_SYS_DRAM_BASE            0xa0000000      /* CS0 */
117 #define CONFIG_SYS_DRAM_SIZE            0x04000000      /* 64 MB DRAM */
118
119 #define CONFIG_SYS_MEMTEST_START        0xa0400000      /* memtest works on */
120 #define CONFIG_SYS_MEMTEST_END          0xa0800000      /* 4 ... 8 MB in DRAM */
121
122 #define CONFIG_SYS_LOAD_ADDR            PHYS_SDRAM_1
123 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
124 #define CONFIG_SYS_INIT_SP_ADDR         0x5c010000
125
126 /*
127  * NOR FLASH
128  */
129 #ifdef  CONFIG_CMD_FLASH
130 #define PHYS_FLASH_1                    0x00000000      /* Flash Bank #1 */
131 #define CONFIG_SYS_FLASH_BASE           PHYS_FLASH_1
132
133 #define CONFIG_SYS_FLASH_CFI
134 #define CONFIG_FLASH_CFI_DRIVER         1
135
136 #define CONFIG_SYS_MAX_FLASH_SECT       (4 + 255)
137 #define CONFIG_SYS_MAX_FLASH_BANKS      1
138
139 #define CONFIG_SYS_FLASH_ERASE_TOUT     (25 * CONFIG_SYS_HZ)
140 #define CONFIG_SYS_FLASH_WRITE_TOUT     (25 * CONFIG_SYS_HZ)
141
142 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE       1
143 #define CONFIG_SYS_FLASH_PROTECTION             1
144
145 #define CONFIG_ENV_IS_IN_FLASH          1
146
147 #else   /* No flash */
148 #define CONFIG_SYS_NO_FLASH
149 #define CONFIG_ENV_IS_NOWHERE
150 #endif
151
152 #define CONFIG_SYS_MONITOR_BASE         0x0
153 #define CONFIG_SYS_MONITOR_LEN          0x40000
154
155 /* Skip factory configuration block */
156 #define CONFIG_ENV_ADDR                 \
157                         (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN + 0x40000)
158 #define CONFIG_ENV_SIZE                 0x40000
159 #define CONFIG_ENV_SECT_SIZE            0x40000
160
161 /*
162  * GPIO settings
163  */
164 #define CONFIG_SYS_GPSR0_VAL    0x00000000
165 #define CONFIG_SYS_GPSR1_VAL    0x00020000
166 #define CONFIG_SYS_GPSR2_VAL    0x0002C000
167 #define CONFIG_SYS_GPSR3_VAL    0x00000000
168
169 #define CONFIG_SYS_GPCR0_VAL    0x00000000
170 #define CONFIG_SYS_GPCR1_VAL    0x00000000
171 #define CONFIG_SYS_GPCR2_VAL    0x00000000
172 #define CONFIG_SYS_GPCR3_VAL    0x00000000
173
174 #define CONFIG_SYS_GPDR0_VAL    0x08000000
175 #define CONFIG_SYS_GPDR1_VAL    0x0002A981
176 #define CONFIG_SYS_GPDR2_VAL    0x0202FC00
177 #define CONFIG_SYS_GPDR3_VAL    0x00000000
178
179 #define CONFIG_SYS_GAFR0_L_VAL  0x00100000
180 #define CONFIG_SYS_GAFR0_U_VAL  0x00C00010
181 #define CONFIG_SYS_GAFR1_L_VAL  0x999A901A
182 #define CONFIG_SYS_GAFR1_U_VAL  0xAAA00008
183 #define CONFIG_SYS_GAFR2_L_VAL  0xAAAAAAAA
184 #define CONFIG_SYS_GAFR2_U_VAL  0x0109A000
185 #define CONFIG_SYS_GAFR3_L_VAL  0x54000300
186 #define CONFIG_SYS_GAFR3_U_VAL  0x00024001
187
188 #define CONFIG_SYS_PSSR_VAL     0x30
189
190 /*
191  * Clock settings
192  */
193 #define CONFIG_SYS_CKEN         0x00500240
194 #define CONFIG_SYS_CCCR         0x02000290
195
196 /*
197  * Memory settings
198  */
199 #define CONFIG_SYS_MSC0_VAL     0x000095f2
200 #define CONFIG_SYS_MSC1_VAL     0x00007ff4
201 #define CONFIG_SYS_MSC2_VAL     0x00000000
202 #define CONFIG_SYS_MDCNFG_VAL   0x08000ac9
203 #define CONFIG_SYS_MDREFR_VAL   0x2013e01e
204 #define CONFIG_SYS_MDMRS_VAL    0x00320032
205 #define CONFIG_SYS_FLYCNFG_VAL  0x00000000
206 #define CONFIG_SYS_SXCNFG_VAL   0x40044004
207
208 /*
209  * PCMCIA and CF Interfaces
210  */
211 #define CONFIG_SYS_MECR_VAL     0x00000001
212 #define CONFIG_SYS_MCMEM0_VAL   0x00014307
213 #define CONFIG_SYS_MCMEM1_VAL   0x00014307
214 #define CONFIG_SYS_MCATT0_VAL   0x0001c787
215 #define CONFIG_SYS_MCATT1_VAL   0x0001c787
216 #define CONFIG_SYS_MCIO0_VAL    0x0001430f
217 #define CONFIG_SYS_MCIO1_VAL    0x0001430f
218
219 #include "pxa-common.h"
220
221 #endif /* __CONFIG_H */