2 * Copyright (c) 2011 The Chromium OS Authors.
4 * Graeme Russ, graeme.russ@gmail.com.
6 * See file CREDITS for list of people who contributed to this
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 #include <asm/ibmpc.h>
27 * board/config.h - configuration options, board specific
34 * High Level Configuration Options
37 #define CONFIG_SYS_COREBOOT
38 #define CONFIG_SHOW_BOOT_PROGRESS
39 #define CONFIG_LAST_STAGE_INIT
40 #define CONFIG_X86_NO_RESET_VECTOR
41 #define CONFIG_SYS_VSNPRINTF
42 #define CONFIG_ZBOOT_32
44 /*-----------------------------------------------------------------------
45 * Watchdog Configuration
47 #undef CONFIG_WATCHDOG
48 #undef CONFIG_HW_WATCHDOG
50 /* SATA AHCI storage */
52 #define CONFIG_SCSI_AHCI
54 #ifdef CONFIG_SCSI_AHCI
55 #define CONFIG_SYS_64BIT_LBA
56 #define CONFIG_SATA_INTEL 1
57 #define CONFIG_SCSI_DEV_LIST {PCI_VENDOR_ID_INTEL, \
58 PCI_DEVICE_ID_INTEL_NM10_AHCI}, \
59 {PCI_VENDOR_ID_INTEL, \
60 PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_MOBILE}, \
61 {PCI_VENDOR_ID_INTEL, \
62 PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_SERIES6}, \
63 {PCI_VENDOR_ID_INTEL, \
64 PCI_DEVICE_ID_INTEL_PANTHERPOINT_AHCI_MOBILE}
66 #define CONFIG_SYS_SCSI_MAX_SCSI_ID 2
67 #define CONFIG_SYS_SCSI_MAX_LUN 1
68 #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
69 CONFIG_SYS_SCSI_MAX_LUN)
72 /* Generic TPM interfaced through LPC bus */
73 #define CONFIG_GENERIC_LPC_TPM
74 #define CONFIG_TPM_TIS_BASE_ADDRESS 0xfed40000
76 /*-----------------------------------------------------------------------
77 * Real Time Clock Configuration
79 #define CONFIG_RTC_MC146818
80 #define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0
81 #define CONFIG_SYS_ISA_IO CONFIG_SYS_ISA_IO_BASE_ADDRESS
83 /*-----------------------------------------------------------------------
84 * Serial Configuration
86 #define CONFIG_CONS_INDEX 1
87 #define CONFIG_SYS_NS16550
88 #define CONFIG_SYS_NS16550_SERIAL
89 #define CONFIG_SYS_NS16550_REG_SIZE 1
90 #define CONFIG_SYS_NS16550_CLK 1843200
91 #define CONFIG_BAUDRATE 9600
92 #define CONFIG_SYS_BAUDRATE_TABLE {300, 600, 1200, 2400, 4800, \
93 9600, 19200, 38400, 115200}
94 #define CONFIG_SYS_NS16550_COM1 UART0_BASE
95 #define CONFIG_SYS_NS16550_COM2 UART1_BASE
96 #define CONFIG_SYS_NS16550_PORT_MAPPED
98 #define CONFIG_STD_DEVICES_SETTINGS "stdin=usbkbd,vga,eserial0\0" \
99 "stdout=vga,eserial0,cbmem\0" \
100 "stderr=vga,eserial0,cbmem\0"
102 #define CONFIG_CONSOLE_MUX
103 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
104 #define CONFIG_SYS_STDIO_DEREGISTER
105 #define CONFIG_CBMEM_CONSOLE
108 #define CONFIG_SYS_IDE_MAXBUS 1
109 /* max. 1 drive per IDE bus */
110 #define CONFIG_SYS_IDE_MAXDEVICE (CONFIG_SYS_IDE_MAXBUS * 1)
112 #define CONFIG_SYS_ATA_BASE_ADDR CONFIG_SYS_ISA_IO_BASE_ADDRESS
113 #define CONFIG_SYS_ATA_IDE0_OFFSET 0x01f0
114 #define CONFIG_SYS_ATA_IDE1_OFFSET 0x0170
115 #define CONFIG_SYS_ATA_DATA_OFFSET 0
116 #define CONFIG_SYS_ATA_REG_OFFSET 0
117 #define CONFIG_SYS_ATA_ALT_OFFSET 0x200
120 #define CONFIG_SUPPORT_VFAT
121 /************************************************************
122 * ATAPI support (experimental)
123 ************************************************************/
126 /************************************************************
127 * DISK Partition support
128 ************************************************************/
129 #define CONFIG_DOS_PARTITION
130 #define CONFIG_MAC_PARTITION
131 #define CONFIG_ISO_PARTITION /* Experimental */
133 #define CONFIG_CMD_CBFS
134 #define CONFIG_CMD_EXT4
135 #define CONFIG_CMD_EXT4_WRITE
137 /*-----------------------------------------------------------------------
138 * Video Configuration
141 #define CONFIG_VIDEO_COREBOOT
142 #define CONFIG_VIDEO_SW_CURSOR
143 #define VIDEO_FB_16BPP_WORD_SWAP
144 #define CONFIG_I8042_KBD
145 #define CONFIG_CFB_CONSOLE
146 #define CONFIG_SYS_CONSOLE_INFO_QUIET
148 /* x86 GPIOs are accessed through a PCI device */
149 #define CONFIG_INTEL_ICH6_GPIO
151 /*-----------------------------------------------------------------------
152 * Command line configuration.
154 #include <config_cmd_default.h>
156 #define CONFIG_CMD_BDI
157 #define CONFIG_CMD_BOOTD
158 #define CONFIG_CMD_CONSOLE
159 #define CONFIG_CMD_DATE
160 #define CONFIG_CMD_ECHO
161 #undef CONFIG_CMD_FLASH
162 #define CONFIG_CMD_FPGA
163 #define CONFIG_CMD_GPIO
164 #define CONFIG_CMD_IMI
165 #undef CONFIG_CMD_IMLS
166 #define CONFIG_CMD_IRQ
167 #define CONFIG_CMD_ITEST
168 #define CONFIG_CMD_LOADB
169 #define CONFIG_CMD_LOADS
170 #define CONFIG_CMD_MEMORY
171 #define CONFIG_CMD_MISC
172 #define CONFIG_CMD_NET
173 #undef CONFIG_CMD_NFS
174 #define CONFIG_CMD_PCI
175 #define CONFIG_CMD_PING
176 #define CONFIG_CMD_RUN
177 #define CONFIG_CMD_SAVEENV
178 #define CONFIG_CMD_SETGETDCR
179 #define CONFIG_CMD_SOURCE
180 #define CONFIG_CMD_XIMG
181 #define CONFIG_CMD_IDE
182 #define CONFIG_CMD_FAT
183 #define CONFIG_CMD_EXT2
185 #define CONFIG_CMD_ZBOOT
187 #define CONFIG_BOOTDELAY 2
188 #define CONFIG_BOOTARGS "root=/dev/mtdblock0 console=ttyS0,9600"
190 #if defined(CONFIG_CMD_KGDB)
191 #define CONFIG_KGDB_BAUDRATE 115200
192 #define CONFIG_KGDB_SER_INDEX 2
196 * Miscellaneous configurable options
198 #define CONFIG_SYS_LONGHELP
199 #define CONFIG_SYS_PROMPT "boot > "
200 #define CONFIG_SYS_CBSIZE 256
201 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
202 sizeof(CONFIG_SYS_PROMPT) + \
204 #define CONFIG_SYS_MAXARGS 16
205 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
207 #define CONFIG_SYS_MEMTEST_START 0x00100000
208 #define CONFIG_SYS_MEMTEST_END 0x01000000
209 #define CONFIG_SYS_LOAD_ADDR 0x100000
210 #define CONFIG_SYS_HZ 1000
211 #define CONFIG_SYS_X86_ISR_TIMER
213 /*-----------------------------------------------------------------------
214 * SDRAM Configuration
216 #define CONFIG_NR_DRAM_BANKS 4
218 /* CONFIG_SYS_SDRAM_DRCTMCTL Overrides the following*/
219 #undef CONFIG_SYS_SDRAM_PRECHARGE_DELAY
220 #undef CONFIG_SYS_SDRAM_RAS_CAS_DELAY
221 #undef CONFIG_SYS_SDRAM_CAS_LATENCY_2T
222 #undef CONFIG_SYS_SDRAM_CAS_LATENCY_3T
224 /*-----------------------------------------------------------------------
228 #define CONFIG_SYS_GENERIC_TIMER
229 #define CONFIG_SYS_PCAT_INTERRUPTS
230 #define CONFIG_SYS_NUM_IRQS 16
232 /*-----------------------------------------------------------------------
233 * Memory organization:
235 * 16kB Cache-As-RAM @ 0x19200000
237 * (128kB + Environment Sector Size) malloc pool
239 #define CONFIG_SYS_STACK_SIZE (32 * 1024)
240 #define CONFIG_SYS_CAR_ADDR 0x19200000
241 #define CONFIG_SYS_CAR_SIZE (16 * 1024)
242 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
243 #define CONFIG_SYS_MONITOR_LEN (256 * 1024)
244 #define CONFIG_SYS_MALLOC_LEN (0x20000 + 128 * 1024)
247 /* allow to overwrite serial and ethaddr */
248 #define CONFIG_ENV_OVERWRITE
250 /*-----------------------------------------------------------------------
251 * FLASH configuration
253 #define CONFIG_SYS_NO_FLASH
254 #undef CONFIG_FLASH_CFI_DRIVER
255 #define CONFIG_SYS_MAX_FLASH_SECT 1
256 #define CONFIG_SYS_MAX_FLASH_BANKS 1
258 /*-----------------------------------------------------------------------
259 * Environment configuration
261 #define CONFIG_ENV_IS_NOWHERE
262 #define CONFIG_ENV_SIZE 0x01000
264 /*-----------------------------------------------------------------------
269 #define CONFIG_EXTRA_ENV_SETTINGS \
270 CONFIG_STD_DEVICES_SETTINGS
272 #endif /* __CONFIG_H */