1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * DHCOM DH-iMX6 PDK board configuration
5 * Copyright (C) 2017 Marek Vasut <marex@denx.de>
8 #ifndef __DH_IMX6_CONFIG_H
9 #define __DH_IMX6_CONFIG_H
11 #include <asm/arch/imx-regs.h>
13 #include "mx6_common.h"
17 * 0x00_0000-0x00_ffff ... U-Boot SPL
18 * 0x01_0000-0x0f_ffff ... U-Boot
19 * 0x10_0000-0x10_ffff ... U-Boot env #1
20 * 0x11_0000-0x11_ffff ... U-Boot env #2
21 * 0x12_0000-0x1f_ffff ... UNUSED
25 #include "imx6_spl.h" /* common IMX6 SPL configuration */
26 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x11400
27 #define CONFIG_SPL_TARGET "u-boot-with-spl.imx"
29 /* Miscellaneous configurable options */
31 #define CONFIG_CMDLINE_TAG
32 #define CONFIG_SETUP_MEMORY_TAGS
33 #define CONFIG_INITRD_TAG
34 #define CONFIG_REVISION_TAG
38 /* Size of malloc() pool */
39 #define CONFIG_SYS_MALLOC_LEN (4 * SZ_1M)
42 #define CONFIG_SYS_BOOTCOUNT_BE
46 #define IMX_FEC_BASE ENET_BASE_ADDR
47 #define CONFIG_FEC_XCV_TYPE RMII
48 #define CONFIG_ETHPRIME "FEC"
49 #define CONFIG_FEC_MXC_PHYADDR 0
50 #define CONFIG_ARP_TIMEOUT 200UL
53 #ifdef CONFIG_CMD_FUSE
54 #define CONFIG_MXC_OCOTP
58 #define CONFIG_SYS_I2C
59 #define CONFIG_SYS_I2C_MXC
60 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
61 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
62 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
63 #define CONFIG_SYS_I2C_SPEED 100000
66 #define CONFIG_FSL_USDHC
67 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
68 #define CONFIG_SYS_FSL_USDHC_NUM 3
69 #define CONFIG_SYS_MMC_ENV_DEV 2 /* 1 = SDHC3, 2 = SDHC4 (eMMC) */
72 #ifdef CONFIG_CMD_SATA
73 #define CONFIG_SYS_SATA_MAX_DEVICE 1
74 #define CONFIG_DWC_AHSATA_PORT_ID 0
75 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
79 /* SPI Flash Configs */
81 #define CONFIG_SF_DEFAULT_BUS 0
82 #define CONFIG_SF_DEFAULT_CS 0
83 #define CONFIG_SF_DEFAULT_SPEED 25000000
84 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
88 #define CONFIG_MXC_UART
89 #define CONFIG_MXC_UART_BASE UART1_BASE
90 #define CONFIG_BAUDRATE 115200
94 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
95 #define CONFIG_USB_HOST_ETHER
96 #define CONFIG_USB_ETHER_ASIX
97 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
98 #define CONFIG_MXC_USB_FLAGS 0
99 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 /* Enabled USB controller number */
101 /* USB Gadget (DFU, UMS) */
102 #if defined(CONFIG_CMD_DFU) || defined(CONFIG_CMD_USB_MASS_STORAGE)
103 #define CONFIG_SYS_DFU_DATA_BUF_SIZE (16 * 1024 * 1024)
104 #define DFU_DEFAULT_POLL_TIMEOUT 300
107 #define CONFIG_G_DNL_UMS_VENDOR_NUM 0x0525
108 #define CONFIG_G_DNL_UMS_PRODUCT_NUM 0xA4A5
113 #define CONFIG_HW_WATCHDOG
114 #define CONFIG_IMX_WATCHDOG
115 #define CONFIG_WATCHDOG_TIMEOUT_MSECS 60000
117 /* allow to overwrite serial and ethaddr */
118 #define CONFIG_ENV_OVERWRITE
120 #define CONFIG_LOADADDR 0x12000000
121 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
123 #ifndef CONFIG_SPL_BUILD
124 #define CONFIG_EXTRA_ENV_SETTINGS \
125 "console=ttymxc0,115200\0" \
126 "fdt_addr=0x18000000\0" \
127 "fdt_high=0xffffffff\0" \
128 "initrd_high=0xffffffff\0" \
129 "kernel_addr_r=0x10008000\0" \
130 "fdt_addr_r=0x13000000\0" \
131 "ramdisk_addr_r=0x18000000\0" \
132 "scriptaddr=0x14000000\0" \
133 "fdtfile=imx6q-dhcom-pdk2.dtb\0"\
136 #define CONFIG_BOOTCOMMAND "run distro_bootcmd"
138 #define BOOT_TARGET_DEVICES(func) \
142 func(SATA, sata, 0) \
145 #include <config_distro_bootcmd.h>
148 /* Physical Memory Map */
149 #define CONFIG_NR_DRAM_BANKS 1
150 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
152 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
153 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
154 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
156 #define CONFIG_SYS_INIT_SP_OFFSET \
157 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
159 #define CONFIG_SYS_INIT_SP_ADDR \
160 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
162 #define CONFIG_SYS_MEMTEST_START 0x10000000
163 #define CONFIG_SYS_MEMTEST_END 0x20000000
164 #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
167 #define CONFIG_ENV_SIZE (16 * 1024)
168 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
170 #if defined(CONFIG_ENV_IS_IN_SPI_FLASH)
171 #define CONFIG_ENV_OFFSET (1024 * 1024)
172 #define CONFIG_ENV_SECT_SIZE (64 * 1024)
173 #define CONFIG_ENV_OFFSET_REDUND \
174 (CONFIG_ENV_OFFSET + CONFIG_ENV_SECT_SIZE)
175 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
176 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
177 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
178 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
179 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
182 #endif /* __DH_IMX6_CONFIG_H */