2 * (C) Copyright 2011 Comelit Group SpA
3 * Luca Ceresoli <luca.ceresoli@comelit.it>
5 * Based on omap3_beagle.h:
6 * (C) Copyright 2006-2008
8 * Richard Woodruff <r-woodruff2@ti.com>
9 * Syed Mohammed Khasim <x0khasim@ti.com>
11 * Configuration settings for the Comelit DIG297 board.
13 * SPDX-License-Identifier: GPL-2.0+
19 #include <asm/mach-types.h>
20 #ifdef MACH_TYPE_OMAP3_CPS
21 #error "MACH_TYPE_OMAP3_CPS has been defined properly, please remove this."
23 #define MACH_TYPE_OMAP3_CPS 2751
25 #define CONFIG_MACH_TYPE MACH_TYPE_OMAP3_CPS
26 /* Common ARM Erratas */
27 #define CONFIG_ARM_ERRATA_454179
28 #define CONFIG_ARM_ERRATA_430973
29 #define CONFIG_ARM_ERRATA_621766
32 * High Level Configuration Options
34 #define CONFIG_OMAP /* in a TI OMAP core */
35 #define CONFIG_OMAP_GPIO
36 #define CONFIG_OMAP_COMMON
38 #define CONFIG_SYS_TEXT_BASE 0x80008000
40 #define CONFIG_SDRC /* The chip has SDRC controller */
42 #include <asm/arch/cpu.h> /* get chip and board defs */
43 #include <asm/arch/omap.h>
46 * Display CPU and Board information
48 #define CONFIG_DISPLAY_CPUINFO
49 #define CONFIG_DISPLAY_BOARDINFO
52 #define V_OSCK 26000000 /* Clock output from T2 */
53 #define V_SCLK (V_OSCK >> 1)
55 #define CONFIG_MISC_INIT_R
57 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
58 #define CONFIG_SETUP_MEMORY_TAGS
59 #define CONFIG_INITRD_TAG
60 #define CONFIG_REVISION_TAG
63 * Size of malloc() pool
65 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
67 #define CONFIG_SYS_MALLOC_LEN (1024 << 10) /* UBI needs >= 512 kB */
74 * NS16550 Configuration
76 #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
78 #define CONFIG_SYS_NS16550
79 #define CONFIG_SYS_NS16550_SERIAL
80 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
81 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
84 * select serial console configuration: UART3 (ttyO2)
86 #define CONFIG_CONS_INDEX 3
87 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
88 #define CONFIG_SERIAL3 3
90 /* allow to overwrite serial and ethaddr */
91 #define CONFIG_ENV_OVERWRITE
92 #define CONFIG_BAUDRATE 115200
93 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
95 #define CONFIG_GENERIC_MMC 1
97 #define CONFIG_OMAP_HSMMC 1
98 #define CONFIG_DOS_PARTITION
100 /* library portions to compile in */
101 #define CONFIG_RBTREE
102 #define CONFIG_MTD_PARTITIONS
105 /* commands to include */
106 #include <config_cmd_default.h>
108 #define CONFIG_CMD_FAT /* FAT support */
109 #define CONFIG_CMD_UBI /* UBI Support */
110 #define CONFIG_CMD_UBIFS /* UBIFS Support */
111 #define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */
112 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
113 #define MTDIDS_DEFAULT "nand0=omap2-nand.0"
114 #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:896k(uboot),"\
115 "128k(uboot-env),3m(kernel),252m(ubi)"
117 #define CONFIG_CMD_I2C /* I2C serial bus support */
118 #define CONFIG_CMD_MMC /* MMC support */
119 #define CONFIG_CMD_NAND /* NAND support */
121 #undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
122 #undef CONFIG_CMD_FPGA /* FPGA configuration Support */
123 #undef CONFIG_CMD_IMI /* iminfo */
124 #undef CONFIG_CMD_IMLS /* List all found images */
125 #undef CONFIG_CMD_NFS /* NFS support */
127 #define CONFIG_SYS_NO_FLASH
128 #define CONFIG_SYS_I2C
129 #define CONFIG_SYS_OMAP24_I2C_SPEED 100000
130 #define CONFIG_SYS_OMAP24_I2C_SLAVE 1
131 #define CONFIG_SYS_I2C_OMAP34XX
136 #define CONFIG_TWL4030_POWER
137 #define CONFIG_TWL4030_LED
142 #define CONFIG_NAND_OMAP_GPMC
143 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT 16
144 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
146 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
147 /* to access nand at */
149 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
151 #if defined(CONFIG_CMD_NET)
156 #define CONFIG_SMC911X
157 #define CONFIG_SMC911X_32_BIT
158 #define CONFIG_SMC911X_BASE 0x2C000000
160 #endif /* (CONFIG_CMD_NET) */
162 /* Environment information */
163 #define CONFIG_BOOTDELAY 1
165 #define CONFIG_EXTRA_ENV_SETTINGS \
166 "loadaddr=0x82000000\0" \
167 "console=ttyO2,115200n8\0" \
168 "mtdids=" MTDIDS_DEFAULT "\0" \
169 "mtdparts=" MTDPARTS_DEFAULT "\0" \
170 "partition=nand0,3\0"\
171 "mmcroot=/dev/mmcblk0p2 rw\0" \
172 "mmcrootfstype=ext3 rootwait\0" \
173 "nandroot=ubi0:rootfs ro\0" \
174 "nandrootfstype=ubifs\0" \
175 "nfspath=/srv/nfs\0" \
176 "tftpfilename=uImage\0" \
177 "gatewayip=0.0.0.0\0" \
178 "mmcargs=setenv bootargs console=${console} " \
181 "rootfstype=${mmcrootfstype} " \
182 "ip=${ipaddr}:${serverip}:${gatewayip}:" \
183 "${netmask}:${hostname}::off\0" \
184 "nandargs=setenv bootargs console=${console} " \
187 "root=${nandroot} " \
188 "rootfstype=${nandrootfstype} " \
189 "ip=${ipaddr}:${serverip}:${gatewayip}:" \
190 "${netmask}:${hostname}::off\0" \
191 "netargs=setenv bootargs console=${console} " \
193 "root=/dev/nfs rw " \
194 "nfsroot=${serverip}:${nfspath} " \
195 "ip=${ipaddr}:${serverip}:${gatewayip}:" \
196 "${netmask}:${hostname}::off\0" \
197 "mmcboot=echo Booting from mmc ...; " \
199 "bootm ${loadaddr}\0" \
200 "nandboot=echo Booting from nand ...; " \
202 "nand read ${loadaddr} 100000 300000; " \
203 "bootm ${loadaddr}\0" \
204 "netboot=echo Booting from network ...; " \
206 "tftp ${loadaddr} ${serverip}:${tftpfilename}; " \
207 "bootm ${loadaddr}\0" \
208 "resetenv=nand erase e0000 20000\0"\
210 #define CONFIG_BOOTCOMMAND \
213 #define CONFIG_AUTO_COMPLETE
215 * Miscellaneous configurable options
217 #define CONFIG_SYS_LONGHELP /* undef to save memory */
218 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
219 #define CONFIG_SYS_PROMPT "DIG297# "
220 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
221 /* Print Buffer Size */
222 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
223 sizeof(CONFIG_SYS_PROMPT) + 16)
224 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
225 /* Boot Argument Buffer Size */
226 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
228 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) /* memtest */
230 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
231 0x01F00000) /* 31MB */
233 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default */
237 * OMAP3 has 12 GP timers, they can be driven by the system clock
238 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
239 * This rate is divided by a local divisor.
241 #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
242 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
244 /*-----------------------------------------------------------------------
245 * Physical Memory Map
247 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
248 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
249 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
251 /*-----------------------------------------------------------------------
252 * FLASH and environment organization
255 /* **** PISMO SUPPORT *** */
256 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
258 #define CONFIG_SYS_FLASH_BASE boot_flash_base
260 /* Monitor at start of flash */
261 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
263 #define CONFIG_ENV_IS_IN_NAND
264 #define SMNAND_ENV_OFFSET 0x0E0000 /* environment starts here */
266 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
267 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
268 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
270 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
271 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
272 #define CONFIG_SYS_INIT_RAM_SIZE 0x800
273 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
274 CONFIG_SYS_INIT_RAM_SIZE - \
275 GENERATED_GBL_DATA_SIZE)
277 #endif /* __CONFIG_H */