2 * Copyright (C) 2014 Stefan Roese <sr@denx.de>
4 * SPDX-License-Identifier: GPL-2.0+
7 #ifndef _CONFIG_SYNOLOGY_DS414_H
8 #define _CONFIG_SYNOLOGY_DS414_H
11 * High Level Configuration Options (easy to change)
15 * TEXT_BASE needs to be below 16MiB, since this area is scrubbed
16 * for DDR ECC byte filling in the SPL before loading the main
19 #define CONFIG_SYS_TCLK 250000000 /* 250MHz */
22 * Commands configuration
26 #define CONFIG_SYS_I2C
27 #define CONFIG_SYS_I2C_MVTWSI
28 #define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
29 #define CONFIG_SYS_I2C_SLAVE 0x0
30 #define CONFIG_SYS_I2C_SPEED 100000
32 /* SPI NOR flash default params, used by sf commands */
33 #define CONFIG_SF_DEFAULT_SPEED 1000000
34 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_3
36 /* Environment in SPI NOR flash */
37 #define CONFIG_ENV_OFFSET 0x7E0000 /* RedBoot config partition in DTS */
38 #define CONFIG_ENV_SIZE (64 << 10) /* 64KiB */
39 #define CONFIG_ENV_SECT_SIZE (64 << 10) /* 64KiB sectors */
41 #define CONFIG_PHY_MARVELL /* there is a marvell phy */
42 #define CONFIG_SYS_NETA_INTERFACE_TYPE PHY_INTERFACE_MODE_RGMII
45 #ifndef CONFIG_SPL_BUILD
46 #define CONFIG_PCI_MVEBU
47 #define CONFIG_PCI_SCAN_SHOW
50 /* USB/EHCI/XHCI configuration */
52 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
54 /* FIXME: broken XHCI support
55 * Below defines should enable support for the two rear USB3 ports. Sadly, this
56 * does not work because:
57 * - xhci-pci seems to not support DM_USB, so with that enabled it is not
59 * - USB init fails, controller does not respond in time */
61 #if !defined(CONFIG_USB_XHCI_HCD)
62 #define CONFIG_EHCI_IS_TDI
65 /* why is this only defined in mv-common.h if CONFIG_DM is undefined? */
66 #define CONFIG_SYS_MVFS
69 * mv-common.h should be defined after CMD configs since it used them
70 * to enable certain macros
72 #include "mv-common.h"
75 * Memory layout while starting into the bin_hdr via the
78 * 0x4000.4000 - 0x4003.4000 headers space (192KiB)
79 * 0x4000.4030 bin_hdr start address
80 * 0x4003.4000 - 0x4004.7c00 BootROM memory allocations (15KiB)
81 * 0x4007.fffc BootROM stack top
83 * The address space between 0x4007.fffc and 0x400f.fff is not locked in
84 * L2 cache thus cannot be used.
89 #define CONFIG_SPL_TEXT_BASE 0x40004030
90 #define CONFIG_SPL_MAX_SIZE ((128 << 10) - 0x4030)
92 #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + (128 << 10))
93 #define CONFIG_SPL_BSS_MAX_SIZE (16 << 10)
95 #ifdef CONFIG_SPL_BUILD
96 #define CONFIG_SYS_MALLOC_SIMPLE
99 #define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10))
100 #define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
102 /* SPL related SPI defines */
103 #define CONFIG_SPL_SPI_LOAD
104 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x24000
106 /* DS414 bus width is 32bits */
107 #define CONFIG_DDR_32BIT
109 /* Default Environment */
110 #define CONFIG_BOOTCOMMAND "sf read ${loadaddr} 0xd0000 0x700000; bootm"
111 #define CONFIG_LOADADDR 0x80000
112 #undef CONFIG_PREBOOT /* override preboot for USB and SPI flash init */
113 #define CONFIG_PREBOOT "usb start; sf probe"
115 #endif /* _CONFIG_SYNOLOGY_DS414_H */