3 * Michael Schwingen, michael@schwingen.org
5 * Configuration settings for the
6 * dLAN200 AV Wireless G ("dvlhost") board.
8 * SPDX-License-Identifier: GPL-2.0+
14 #define CONFIG_IXP425 1
15 #define CONFIG_DVLHOST 1
17 #define CONFIG_MACH_TYPE 1343
19 #define CONFIG_DISPLAY_CPUINFO 1
20 #define CONFIG_DISPLAY_BOARDINFO 1
22 #define CONFIG_IXP_SERIAL
23 #define CONFIG_SYS_IXP425_CONSOLE IXP425_UART2
24 #define CONFIG_BAUDRATE 115200
25 #define CONFIG_BOOTDELAY 3
26 #define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
27 #define CONFIG_BOARD_EARLY_INIT_F 1
28 #define CONFIG_SYS_LDSCRIPT "board/dvlhost/u-boot.lds"
30 /***************************************************************
31 * U-boot generic defines start here.
32 ***************************************************************/
33 /* Size of malloc() pool */
34 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
36 /* allow to overwrite serial and ethaddr */
37 #define CONFIG_ENV_OVERWRITE
39 /* Command line configuration. */
40 #include <config_cmd_default.h>
42 #define CONFIG_CMD_ELF
45 #define CONFIG_CMD_PCI
46 #define CONFIG_PCI_PNP
47 #define CONFIG_IXP_PCI
48 #define CONFIG_PCI_SCAN_SHOW
49 #define CONFIG_CMD_PCI_ENUM
52 #define CONFIG_BOOTCOMMAND "run boot_flash"
53 /* enable passing of ATAGs */
54 #define CONFIG_CMDLINE_TAG 1
55 #define CONFIG_SETUP_MEMORY_TAGS 1
56 #define CONFIG_INITRD_TAG 1
58 #if defined(CONFIG_CMD_KGDB)
59 # define CONFIG_KGDB_BAUDRATE 230400
60 /* which serial port to use */
61 # define CONFIG_KGDB_SER_INDEX 1
64 /* Miscellaneous configurable options */
65 #define CONFIG_SYS_LONGHELP
66 /* Console I/O Buffer Size */
67 #define CONFIG_SYS_CBSIZE 256
68 /* Print Buffer Size */
69 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
70 /* max number of command args */
71 #define CONFIG_SYS_MAXARGS 16
72 /* Boot Argument Buffer Size */
73 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
75 #define CONFIG_SYS_MEMTEST_START 0x00000000
76 #define CONFIG_SYS_MEMTEST_END 0x01D80000
78 /* timer clock - 2* OSC_IN system clock */
79 #define CONFIG_IXP425_TIMER_CLK 66666666
81 /* default load address */
82 #define CONFIG_SYS_LOAD_ADDR 0x00010000
85 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \
87 #define CONFIG_SERIAL_RTS_ACTIVE 1
89 /* Expansion bus settings */
90 #define CONFIG_SYS_EXP_CS0 0xbd113442
93 #define CONFIG_NR_DRAM_BANKS 1
94 #define PHYS_SDRAM_1 0x00000000
95 #define CONFIG_SYS_SDRAM_BASE 0x00000000
97 /* 32MB SDRAM: 2* 8Mx16, CL3 */
98 #define CONFIG_SYS_SDR_CONFIG 0x18
99 #define PHYS_SDRAM_1_SIZE 0x02000000
100 #define CONFIG_SYS_SDRAM_REFRESH_CNT 0x800
101 #define CONFIG_SYS_SDR_MODE_CONFIG 0x1
102 #define CONFIG_SYS_DRAM_SIZE PHYS_SDRAM_1_SIZE
104 /* FLASH organization: one Spansion S29AL032D-04 Flash */
105 #define CONFIG_SYS_TEXT_BASE 0x50000000
106 #define CONFIG_SYS_MAX_FLASH_BANKS 1
107 /* max number of sectors on one chip */
108 #define CONFIG_SYS_MAX_FLASH_SECT 140
109 #define PHYS_FLASH_1 0x50000000
110 #define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1 }
112 #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
113 #define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1
114 #define CONFIG_SYS_MONITOR_LEN (256 << 10)
115 #define CONFIG_BOARD_SIZE_LIMIT 262144
117 /* Use common CFI driver */
118 #define CONFIG_SYS_FLASH_CFI
119 #define CONFIG_FLASH_CFI_DRIVER
120 /* no byte writes on IXP4xx */
121 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
123 /* print 'E' for empty sector on flinfo */
124 #define CONFIG_SYS_FLASH_EMPTY_INFO
128 /* include IXP4xx NPE support */
129 #define CONFIG_IXP4XX_NPE 1
131 /* NPE0 PHY: MII dLAN200 AVmodule, 100BaseT-FDX fixed */
132 #define CONFIG_PHY_ADDR 0x18
133 /* NPE1 PHY: MII IP175 switch, port 5 is host port */
134 #define CONFIG_PHY1_ADDR 0x05
135 /* MII PHY management */
137 /* fixed-speed powerline modem without standard PHY registers on MII */
138 #define CONFIG_MII_NPE0_FIXEDLINK 1
139 #define CONFIG_MII_NPE0_SPEED 100
140 #define CONFIG_MII_NPE0_FULLDUPLEX 1
141 /* fixed-speed switch without standard PHY registers on MII */
142 #define CONFIG_MII_NPE1_FIXEDLINK 1
143 #define CONFIG_MII_NPE1_SPEED 100
144 #define CONFIG_MII_NPE1_FULLDUPLEX 1
146 /* Number of ethernet rx buffers & descriptors */
147 #define CONFIG_SYS_RX_ETH_BUFFER 16
148 #define CONFIG_RESET_PHY_R 1
149 /* ethernet switch connected to MII port */
150 #define CONFIG_MII_ETHSWITCH 1
151 #define CONFIG_HAS_ETH1 1
153 #define CONFIG_CMD_DHCP
154 #define CONFIG_CMD_NET
155 #define CONFIG_CMD_MII
156 #define CONFIG_CMD_PING
157 #undef CONFIG_CMD_NFS
160 #define CONFIG_BOOTP_BOOTFILESIZE
161 #define CONFIG_BOOTP_BOOTPATH
162 #define CONFIG_BOOTP_GATEWAY
163 #define CONFIG_BOOTP_HOSTNAME
165 /* Cache Configuration */
166 #define CONFIG_SYS_CACHELINE_SIZE 32
169 * environment organization:
170 * one flash sector, embedded in uboot area (bottom bootblock flash)
172 #define CONFIG_ENV_IS_IN_FLASH 1
173 #define CONFIG_ENV_SIZE 0x2000
174 #define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x4000)
175 #define CONFIG_SYS_USE_PPCENV 1
177 #define CONFIG_EXTRA_ENV_SETTINGS \
178 "npe_ucode=50040000\0" \
181 "mtd=IXP4XX-Flash.0:256k(uboot),64k(ucode),1152k(linux),-(root),\0" \
182 "kerneladdr=50050000\0" \
183 "kernelfile=dvlhost/uImage\0" \
184 "rootfile=dvlhost/rootfs\0" \
185 "rootaddr=50170000\0" \
187 "updateboot_ser=mw.b 10000 ff 40000;" \
188 " loady ${loadaddr};" \
189 " run eraseboot writeboot\0" \
190 "updateboot_net=mw.b 10000 ff 40000;" \
191 " tftp ${loadaddr} dvlhost/u-boot.bin;" \
192 " run eraseboot writeboot\0" \
193 "eraseboot=protect off 50000000 50003fff;" \
194 " protect off 50006000 5003ffff;" \
195 " erase 50000000 50003fff;" \
196 " erase 50006000 5003ffff\0" \
197 "writeboot=cp.b 10000 50000000 4000;" \
198 " cp.b 16000 50006000 3a000\0" \
199 "updateucode=loady;" \
200 " era ${npe_ucode} +${filesize};" \
201 " cp.b ${loadaddr} ${npe_ucode} ${filesize}\0" \
202 "updateroot=tftp ${loadaddr} ${rootfile};" \
203 " era ${rootaddr} +${filesize};" \
204 " cp.b ${loadaddr} ${rootaddr} ${filesize}\0" \
205 "updatekern=tftp ${loadaddr} ${kernelfile};" \
206 " era ${kerneladdr} +${filesize};" \
207 " cp.b ${loadaddr} ${kerneladdr} ${filesize}\0" \
208 "flashargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3" \
209 " rootfstype=squashfs,jffs2 init=/etc/preinit\0" \
210 "netargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3" \
211 " rootfstype=squashfs,jffs2 init=/etc/preinit\0" \
212 "addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0" \
213 "addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0" \
214 "boot_flash=run flashargs addtty addeth;" \
215 " bootm ${kerneladdr}\0" \
216 "boot_net=run netargs addtty addeth;" \
217 " tftpboot ${loadaddr} ${kernelfile};" \
220 /* additions for new relocation code, must be added to all boards */
221 #define CONFIG_SYS_INIT_SP_ADDR \
222 (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
224 #endif /* __CONFIG_H */