2 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
4 * Based on davinci_dvevm.h. Original Copyrights follow:
6 * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
29 #define CONFIG_DRIVER_TI_EMAC
30 #define CONFIG_USE_SPIFLASH
31 #define CONFIG_DRIVER_TI_EMAC_USE_RMII
36 #define CONFIG_MACH_DAVINCI_DA850_EVM
37 #define CONFIG_ARM926EJS /* arm926ejs CPU core */
38 #define CONFIG_SOC_DA8XX /* TI DA8xx SoC */
39 #define CONFIG_SYS_CLK_FREQ clk_get(DAVINCI_ARM_CLKID)
40 #define CONFIG_SYS_OSCIN_FREQ 24000000
41 #define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE
42 #define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID)
43 #define CONFIG_SYS_HZ 1000
44 #define CONFIG_SKIP_LOWLEVEL_INIT
45 #define CONFIG_SYS_TEXT_BASE 0xc1080000
50 #define CONFIG_SYS_MALLOC_LEN (0x10000 + 1*1024*1024) /* malloc() len */
51 #define PHYS_SDRAM_1 DAVINCI_DDR_EMIF_DATA_BASE /* DDR Start */
52 #define PHYS_SDRAM_1_SIZE (64 << 20) /* SDRAM size 64MB */
53 #define CONFIG_MAX_RAM_BANK_SIZE (512 << 20) /* max size from SPRS586*/
55 /* memtest start addr */
56 #define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM_1 + 0x2000000)
58 /* memtest will be run on 16MB */
59 #define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + 0x2000000 + 16*1024*1024)
61 #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
62 #define CONFIG_STACKSIZE (256*1024) /* regular stack */
67 #define CONFIG_SYS_NS16550
68 #define CONFIG_SYS_NS16550_SERIAL
69 #define CONFIG_SYS_NS16550_REG_SIZE -4 /* NS16550 register size */
70 #define CONFIG_SYS_NS16550_COM1 DAVINCI_UART2_BASE /* Base address of UART2 */
71 #define CONFIG_SYS_NS16550_CLK clk_get(DAVINCI_UART2_CLKID)
72 #define CONFIG_CONS_INDEX 1 /* use UART0 for console */
73 #define CONFIG_BAUDRATE 115200 /* Default baud rate */
74 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
77 #define CONFIG_SPI_FLASH
78 #define CONFIG_SPI_FLASH_STMICRO
79 #define CONFIG_DAVINCI_SPI
80 #define CONFIG_SYS_SPI_BASE DAVINCI_SPI1_BASE
81 #define CONFIG_SYS_SPI_CLK clk_get(DAVINCI_SPI1_CLKID)
82 #define CONFIG_SF_DEFAULT_SPEED 30000000
83 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
86 * Network & Ethernet Configuration
88 #ifdef CONFIG_DRIVER_TI_EMAC
89 #define CONFIG_EMAC_MDIO_PHY_NUM 0
91 #define CONFIG_BOOTP_DEFAULT
92 #define CONFIG_BOOTP_DNS
93 #define CONFIG_BOOTP_DNS2
94 #define CONFIG_BOOTP_SEND_HOSTNAME
95 #define CONFIG_NET_RETRY_COUNT 10
98 #ifdef CONFIG_USE_SPIFLASH
99 #undef CONFIG_ENV_IS_IN_FLASH
100 #undef CONFIG_ENV_IS_IN_NAND
101 #define CONFIG_ENV_IS_IN_SPI_FLASH
102 #define CONFIG_ENV_SIZE (8 << 10)
103 #define CONFIG_ENV_OFFSET (256 << 10)
104 #define CONFIG_ENV_SECT_SIZE (64 << 10)
105 #define CONFIG_SYS_NO_FLASH
109 * U-Boot general configuration
111 #define CONFIG_BOOTFILE "uImage" /* Boot file name */
112 #define CONFIG_SYS_PROMPT "ea20 > " /* Command Prompt */
113 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
114 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
115 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
116 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */
117 #define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1 + 0x700000)
118 #define CONFIG_VERSION_VARIABLE
119 #define CONFIG_AUTO_COMPLETE
120 #define CONFIG_SYS_HUSH_PARSER
121 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
122 #define CONFIG_CMDLINE_EDITING
123 #define CONFIG_SYS_LONGHELP
124 #define CONFIG_CRC32_VERIFY
125 #define CONFIG_MX_CYCLIC
130 #define LINUX_BOOT_PARAM_ADDR (PHYS_SDRAM_1 + 0x100)
131 #define CONFIG_CMDLINE_TAG
132 #define CONFIG_SETUP_MEMORY_TAGS
133 #define CONFIG_BOOTDELAY 3
138 #include <config_cmd_default.h>
139 #define CONFIG_CMD_ENV
140 #define CONFIG_CMD_ASKENV
141 #define CONFIG_CMD_DHCP
142 #define CONFIG_CMD_DIAG
143 #define CONFIG_CMD_MII
144 #define CONFIG_CMD_PING
145 #define CONFIG_CMD_SAVES
146 #define CONFIG_CMD_MEMORY
148 #ifndef CONFIG_DRIVER_TI_EMAC
149 #undef CONFIG_CMD_NET
150 #undef CONFIG_CMD_DHCP
151 #undef CONFIG_CMD_MII
152 #undef CONFIG_CMD_PING
155 #ifdef CONFIG_USE_NAND
156 #undef CONFIG_CMD_FLASH
157 #undef CONFIG_CMD_IMLS
158 #define CONFIG_CMD_NAND
160 #define CONFIG_CMD_MTDPARTS
161 #define CONFIG_MTD_DEVICE
162 #define CONFIG_MTD_PARTITIONS
164 #define CONFIG_RBTREE
165 #define CONFIG_CMD_UBI
166 #define CONFIG_CMD_UBIFS
169 #ifdef CONFIG_USE_SPIFLASH
170 #undef CONFIG_CMD_IMLS
171 #undef CONFIG_CMD_FLASH
172 #define CONFIG_CMD_SPI
173 #define CONFIG_CMD_SF
174 #define CONFIG_CMD_SAVEENV
177 #if !defined(CONFIG_USE_NAND) && \
178 !defined(CONFIG_USE_NOR) && \
179 !defined(CONFIG_USE_SPIFLASH)
180 #define CONFIG_ENV_IS_NOWHERE
181 #define CONFIG_SYS_NO_FLASH
182 #define CONFIG_ENV_SIZE (16 << 10)
183 #undef CONFIG_CMD_IMLS
184 #undef CONFIG_CMD_ENV
187 /* additions for new relocation code, must added to all boards */
188 #define CONFIG_SYS_SDRAM_BASE 0xc0000000
189 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - \
190 GENERATED_GBL_DATA_SIZE)
191 #endif /* __CONFIG_H */