3 * egnite GmbH <info@egnite.de>
5 * Configuation settings for Ethernut 5 with AT91SAM9XE.
7 * SPDX-License-Identifier: GPL-2.0+
13 #include <asm/hardware.h>
15 /* The first stage boot loader expects u-boot running at this address. */
17 /* The first stage boot loader takes care of low level initialization. */
18 #define CONFIG_SKIP_LOWLEVEL_INIT
20 /* Set our official architecture number. */
21 #define CONFIG_MACH_TYPE MACH_TYPE_ETHERNUT5
24 #define CONFIG_ARCH_CPU_INIT
26 /* ARM asynchronous clock */
27 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
28 #define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */
30 /* 32kB internal SRAM */
31 #define CONFIG_SRAM_BASE 0x00300000 /*AT91SAM9XE_SRAM_BASE */
32 #define CONFIG_SRAM_SIZE (32 << 10)
33 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SRAM_BASE + CONFIG_SRAM_SIZE - \
34 GENERATED_GBL_DATA_SIZE)
36 /* 128MB SDRAM in 1 bank */
37 #define CONFIG_NR_DRAM_BANKS 1
38 #define CONFIG_SYS_SDRAM_BASE 0x20000000
39 #define CONFIG_SYS_SDRAM_SIZE (128 << 20)
40 #define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE
41 #define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR
42 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (1 << 20))
43 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
44 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE \
45 - CONFIG_SYS_MALLOC_LEN)
47 /* 512kB on-chip NOR flash */
48 # define CONFIG_SYS_MAX_FLASH_BANKS 1
49 # define CONFIG_SYS_FLASH_BASE 0x00200000 /* AT91SAM9XE_FLASH_BASE */
50 # define CONFIG_AT91_EFLASH
51 # define CONFIG_SYS_MAX_FLASH_SECT 32
52 # define CONFIG_SYS_FLASH_PROTECTION /* First stage loader in sector 0 */
53 # define CONFIG_EFLASH_PROTSECTORS 1
56 /* bootstrap + u-boot + env + linux in dataflash on CS0 */
57 #define CONFIG_ENV_OFFSET 0x3DE000
58 #define CONFIG_ENV_SIZE (132 << 10)
59 #define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE
60 #define CONFIG_ENV_SPI_MAX_HZ 15000000
62 #ifndef MINIMAL_LOADER
66 #ifdef CONFIG_CMD_NAND
67 #define CONFIG_SYS_MAX_NAND_DEVICE 1
68 #define CONFIG_SYS_NAND_BASE 0x40000000
69 #define CONFIG_SYS_NAND_DBW_8
70 #define CONFIG_NAND_ATMEL
72 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
74 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
75 #define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PC(14)
79 #ifdef CONFIG_CMD_JFFS2
80 #define CONFIG_JFFS2_CMDLINE
81 #define CONFIG_JFFS2_NAND
85 #define CONFIG_NET_RETRY_COUNT 20
88 #define CONFIG_PHY_ID 0
89 #define CONFIG_MACB_SEARCH_PHY
93 #define CONFIG_GENERIC_ATMEL_MCI
94 #define CONFIG_SYS_MMC_CD_PIN AT91_PIO_PORTC, 8
99 #define CONFIG_USB_ATMEL
100 #define CONFIG_USB_ATMEL_CLK_SEL_PLLB
101 #define CONFIG_USB_OHCI_NEW
102 #define CONFIG_SYS_USB_OHCI_CPU_INIT
103 #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000
104 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "host"
105 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
109 #if defined(CONFIG_CMD_DATE) || defined(CONFIG_CMD_SNTP)
110 #define CONFIG_RTC_PCF8563
111 #define CONFIG_SYS_I2C_RTC_ADDR 0x51
115 #define CONFIG_SYS_MAX_I2C_BUS 1
117 #define CONFIG_SYS_I2C
118 #define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
119 #define CONFIG_SYS_I2C_SOFT_SPEED 100000
120 #define CONFIG_SYS_I2C_SOFT_SLAVE 0
122 #define I2C_SOFT_DECLARATIONS
124 #define GPIO_I2C_SCL AT91_PIO_PORTA, 24
125 #define GPIO_I2C_SDA AT91_PIO_PORTA, 23
128 at91_set_pio_periph(AT91_PIO_PORTA, 23, 0); \
129 at91_set_pio_multi_drive(AT91_PIO_PORTA, 23, 1); \
130 at91_set_pio_periph(AT91_PIO_PORTA, 24, 0); \
131 at91_set_pio_output(AT91_PIO_PORTA, 24, 0); \
132 at91_set_pio_multi_drive(AT91_PIO_PORTA, 24, 1); \
135 #define I2C_ACTIVE at91_set_pio_output(AT91_PIO_PORTA, 23, 0)
136 #define I2C_TRISTATE at91_set_pio_input(AT91_PIO_PORTA, 23, 0)
137 #define I2C_SCL(bit) at91_set_pio_value(AT91_PIO_PORTA, 24, bit)
138 #define I2C_SDA(bit) at91_set_pio_value(AT91_PIO_PORTA, 23, bit)
139 #define I2C_DELAY udelay(100)
140 #define I2C_READ at91_get_pio_value(AT91_PIO_PORTA, 23)
142 /* DHCP/BOOTP options */
143 #ifdef CONFIG_CMD_DHCP
144 #define CONFIG_BOOTP_BOOTFILESIZE
145 #define CONFIG_SYS_AUTOLOAD "n"
149 #define CONFIG_MTD_DEVICE
150 #define CONFIG_MTD_PARTITIONS
153 #define CONFIG_CMDLINE_TAG
154 #define CONFIG_SETUP_MEMORY_TAGS
155 #define CONFIG_INITRD_TAG
156 #define CONFIG_BOOTCOMMAND "sf probe 0:0; " \
157 "sf read 0x22000000 0xc6000 0x294000; " \
160 /* Misc. u-boot settings */