2 * Copyright (C) 2015 Timesys Corporation
3 * Copyright (C) 2015 General Electric Company
4 * Copyright (C) 2014 Advantech
5 * Copyright (C) 2012 Freescale Semiconductor, Inc.
7 * Configuration settings for the GE MX6Q Bx50v3 boards.
9 * SPDX-License-Identifier: GPL-2.0+
12 #ifndef __GE_BX50V3_CONFIG_H
13 #define __GE_BX50V3_CONFIG_H
15 #include <asm/arch/imx-regs.h>
16 #include <asm/imx-common/gpio.h>
18 #define BX50V3_BOOTARGS_EXTRA
19 #if defined(CONFIG_TARGET_GE_B450V3)
20 #define CONFIG_BOARD_NAME "General Electric B450v3"
21 #elif defined(CONFIG_TARGET_GE_B650V3)
22 #define CONFIG_BOARD_NAME "General Electric B650v3"
23 #elif defined(CONFIG_TARGET_GE_B850V3)
24 #define CONFIG_BOARD_NAME "General Electric B850v3"
25 #undef BX50V3_BOOTARGS_EXTRA
26 #define BX50V3_BOOTARGS_EXTRA "video=DP-1:1024x768@60 " \
27 "video=HDMI-A-1:1024x768@60 "
29 #define CONFIG_BOARD_NAME "General Electric BA16 Generic"
32 #define CONFIG_MXC_UART_BASE UART3_BASE
33 #define CONSOLE_DEV "ttymxc2"
35 #define CONFIG_SUPPORT_EMMC_BOOT
38 #include "mx6_common.h"
39 #include <linux/sizes.h>
41 #define CONFIG_CMDLINE_TAG
42 #define CONFIG_SETUP_MEMORY_TAGS
43 #define CONFIG_INITRD_TAG
44 #define CONFIG_REVISION_TAG
45 #define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
47 #define CONFIG_BOARD_EARLY_INIT_F
49 #define CONFIG_MXC_GPIO
50 #define CONFIG_MXC_UART
52 #define CONFIG_CMD_FUSE
53 #define CONFIG_MXC_OCOTP
56 #ifdef CONFIG_CMD_SATA
57 #define CONFIG_DWC_AHSATA
58 #define CONFIG_SYS_SATA_MAX_DEVICE 1
59 #define CONFIG_DWC_AHSATA_PORT_ID 0
60 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
66 #define CONFIG_FSL_ESDHC
67 #define CONFIG_FSL_USDHC
68 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
69 #define CONFIG_GENERIC_MMC
70 #define CONFIG_BOUNCE_BUFFER
71 #define CONFIG_DOS_PARTITION
75 #define CONFIG_USB_EHCI
76 #define CONFIG_USB_EHCI_MX6
77 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
78 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
79 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
80 #define CONFIG_MXC_USB_FLAGS 0
81 #define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP
84 #define CONFIG_USBD_HS
85 #define CONFIG_USB_GADGET_DUALSPEED
86 #define CONFIG_USB_GADGET
87 #define CONFIG_USB_GADGET_DOWNLOAD
88 #define CONFIG_USB_GADGET_MASS_STORAGE
89 #define CONFIG_USB_FUNCTION_MASS_STORAGE
90 #define CONFIG_USB_GADGET_VBUS_DRAW 2
91 #define CONFIG_G_DNL_VENDOR_NUM 0x0525
92 #define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5
93 #define CONFIG_G_DNL_MANUFACTURER "Advantech"
96 /* Networking Configs */
98 #define CONFIG_FEC_MXC
100 #define IMX_FEC_BASE ENET_BASE_ADDR
101 #define CONFIG_FEC_XCV_TYPE RGMII
102 #define CONFIG_ETHPRIME "FEC"
103 #define CONFIG_FEC_MXC_PHYADDR 4
104 #define CONFIG_PHYLIB
105 #define CONFIG_PHY_ATHEROS
110 #define CONFIG_MXC_SPI
111 #define CONFIG_SF_DEFAULT_BUS 0
112 #define CONFIG_SF_DEFAULT_CS 0
113 #define CONFIG_SF_DEFAULT_SPEED 20000000
114 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
117 /* allow to overwrite serial and ethaddr */
118 #define CONFIG_ENV_OVERWRITE
119 #define CONFIG_CONS_INDEX 1
120 #define CONFIG_BAUDRATE 115200
122 /* Command definition */
123 #define CONFIG_CMD_BMODE
125 #define CONFIG_LOADADDR 0x12000000
126 #define CONFIG_SYS_TEXT_BASE 0x17800000
128 #define CONFIG_EXTRA_ENV_SETTINGS \
129 "script=boot.scr\0" \
130 "image=/boot/uImage\0" \
131 "uboot=u-boot.imx\0" \
132 "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
133 "fdt_addr=0x18000000\0" \
136 "console=" CONSOLE_DEV "\0" \
137 "fdt_high=0xffffffff\0" \
138 "initrd_high=0xffffffff\0" \
142 "update_sd_firmware=" \
143 "if test ${ip_dyn} = yes; then " \
144 "setenv get_cmd dhcp; " \
146 "setenv get_cmd tftp; " \
148 "if mmc dev ${mmcdev}; then " \
149 "if ${get_cmd} ${update_sd_firmware_filename}; then " \
150 "setexpr fw_sz ${filesize} / 0x200; " \
151 "setexpr fw_sz ${fw_sz} + 1; " \
152 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \
156 "if tftp $loadaddr $uboot; then " \
158 "sf erase 0 0xC0000; " \
159 "sf write $loadaddr 0x400 $filesize; " \
160 "echo 'U-Boot upgraded. Please reset'; " \
162 "setargs=setenv bootargs console=${console},${baudrate} " \
163 "root=/dev/${rootdev} rw rootwait cma=128M " \
164 BX50V3_BOOTARGS_EXTRA "\0" \
166 "ext2load ${dev} ${devnum}:${partnum} ${loadaddr} ${script};\0" \
167 "bootscript=echo Running bootscript from ${dev}:${devnum}:${partnum};" \
170 "ext2load ${dev} ${devnum}:${partnum} ${loadaddr} ${image}\0" \
171 "loadfdt=ext2load ${dev} ${devnum}:${partnum} ${fdt_addr} ${fdt_file}\0" \
173 "if run loadbootscript; then " \
176 "if run loadimage; then " \
180 "doboot=echo Booting from ${dev}:${devnum}:${partnum} ...; " \
182 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
183 "if run loadfdt; then " \
184 "bootm ${loadaddr} - ${fdt_addr}; " \
186 "if test ${boot_fdt} = try; then " \
189 "echo WARN: Cannot load the DT; " \
195 "netargs=setenv bootargs console=${console},${baudrate} " \
197 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
198 "netboot=echo Booting from net ...; " \
200 "if test ${ip_dyn} = yes; then " \
201 "setenv get_cmd dhcp; " \
203 "setenv get_cmd tftp; " \
205 "${get_cmd} ${image}; " \
206 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
207 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
208 "bootm ${loadaddr} - ${fdt_addr}; " \
210 "if test ${boot_fdt} = try; then " \
213 "echo WARN: Cannot load the DT; " \
220 #define CONFIG_MMCBOOTCOMMAND \
222 "setenv rootdev mmcblk0p${partnum}; " \
224 "setenv devnum ${sddev}; " \
225 "if mmc dev ${devnum}; then " \
227 "setenv rootdev mmcblk1p${partnum}; " \
230 "setenv devnum ${emmcdev}; " \
231 "if mmc dev ${devnum}; then " \
235 #define CONFIG_USBBOOTCOMMAND \
238 "setenv devnum 0; " \
239 "setenv rootdev sda${partnum}; " \
242 CONFIG_MMCBOOTCOMMAND \
245 #ifdef CONFIG_CMD_USB
246 #define CONFIG_BOOTCOMMAND CONFIG_USBBOOTCOMMAND
248 #define CONFIG_BOOTCOMMAND CONFIG_MMCBOOTCOMMAND
251 #define CONFIG_ARP_TIMEOUT 200UL
253 /* Miscellaneous configurable options */
254 #define CONFIG_SYS_LONGHELP
255 #define CONFIG_AUTO_COMPLETE
257 /* Print Buffer Size */
258 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
259 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
261 #define CONFIG_SYS_MEMTEST_START 0x10000000
262 #define CONFIG_SYS_MEMTEST_END 0x10010000
263 #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
265 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
267 #define CONFIG_CMDLINE_EDITING
268 #define CONFIG_STACKSIZE (128 * 1024)
270 /* Physical Memory Map */
271 #define CONFIG_NR_DRAM_BANKS 1
272 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
274 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
275 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
276 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
278 #define CONFIG_SYS_INIT_SP_OFFSET \
279 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
280 #define CONFIG_SYS_INIT_SP_ADDR \
281 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
283 /* FLASH and environment organization */
284 #define CONFIG_SYS_NO_FLASH
286 #define CONFIG_ENV_IS_IN_SPI_FLASH
287 #define CONFIG_ENV_SIZE (8 * 1024)
288 #define CONFIG_ENV_OFFSET (768 * 1024)
289 #define CONFIG_ENV_SECT_SIZE (64 * 1024)
290 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
291 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
292 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
293 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
295 #ifndef CONFIG_SYS_DCACHE_OFF
298 #define CONFIG_SYS_FSL_USDHC_NUM 3
302 #define CONFIG_VIDEO_IPUV3
303 #define CONFIG_VIDEO_BMP_RLE8
304 #define CONFIG_SPLASH_SCREEN
305 #define CONFIG_SPLASH_SCREEN_ALIGN
306 #define CONFIG_BMP_16BPP
307 #define CONFIG_VIDEO_LOGO
308 #define CONFIG_VIDEO_BMP_LOGO
309 #define CONFIG_IPUV3_CLK 260000000
310 #define CONFIG_IMX_HDMI
311 #define CONFIG_IMX_VIDEO_SKIP
314 #define CONFIG_PWM_IMX
315 #define CONFIG_IMX6_PWM_PER_CLK 66000000
317 #undef CONFIG_CMD_PCI
318 #ifdef CONFIG_CMD_PCI
319 #define CONFIG_PCI_SCAN_SHOW
320 #define CONFIG_PCIE_IMX
321 #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12)
322 #define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(1, 5)
326 #define CONFIG_SYS_I2C
327 #define CONFIG_SYS_I2C_MXC
328 #define CONFIG_SYS_I2C_SPEED 100000
329 #define CONFIG_SYS_I2C_MXC_I2C1
330 #define CONFIG_SYS_I2C_MXC_I2C2
331 #define CONFIG_SYS_I2C_MXC_I2C3
333 #endif /* __GE_BX50V3_CONFIG_H */