1 /* Configuration header file for Gaisler GR-CPCI-AX2000
2 * AX board. Note that since the AX is removable the configuration
3 * for this board must be edited below.
5 * (C) Copyright 2003-2005
6 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
9 * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com.
11 * See file CREDITS for list of people who contributed to this
14 * This program is free software; you can redistribute it and/or
15 * modify it under the terms of the GNU General Public License as
16 * published by the Free Software Foundation; either version 2 of
17 * the License, or (at your option) any later version.
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, write to the Free Software
26 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
34 * High Level Configuration Options
38 #define CONFIG_LEON3 /* This is an LEON3 CPU */
39 #define CONFIG_LEON 1 /* This is an LEON CPU */
40 #define CONFIG_CPCI_AX2000 1 /* ... on GR-CPCI-AX2000 board */
42 #define CONFIG_LEON_RAM_SRAM 1
43 #define CONFIG_LEON_RAM_SDRAM 2
44 #define CONFIG_LEON_RAM_SDRAM_NOSRAM 3
46 /* Select Memory to run from
48 * SRAM - UBoot is run in SRAM, SRAM-0x40000000, SDRAM-0x60000000
49 * SDRAM - UBoot is run in SDRAM, SRAM-0x40000000 and SDRAM-0x60000000
50 * SDRAM_NOSRAM - UBoot is run in SDRAM, SRAM not available, SDRAM at 0x40000000
52 * Note, if Linux is to be used, SDRAM or SDRAM_NOSRAM is required since
53 * it doesn't fit into the 4Mb SRAM.
55 * SRAM is default since it will work for all systems, however will not
56 * be able to boot linux.
58 #define CONFIG_LEON_RAM_SELECT CONFIG_LEON_RAM_SRAM
60 /* CPU / AMBA BUS configuration */
61 #define CONFIG_SYS_CLK_FREQ 20000000 /* 20MHz */
63 /* Number of SPARC register windows */
64 #define CFG_SPARC_NWINDOWS 8
67 * Serial console configuration
69 #define CONFIG_BAUDRATE 38400 /* ... at 38400 bps */
70 #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
73 #define CONFIG_DOS_PARTITION
74 #define CONFIG_MAC_PARTITION
75 #define CONFIG_ISO_PARTITION
80 #include <config_cmd_default.h>
82 #define CONFIG_CMD_REGINFO
83 #define CONFIG_CMD_AMBAPP
84 #define CONFIG_CMD_PING
85 #define CONFIG_CMD_DIAG
86 #define CONFIG_CMD_IRQ
91 #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
93 #define CONFIG_PREBOOT "echo;" \
94 "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
97 #undef CONFIG_BOOTARGS
99 #define CONFIG_EXTRA_ENV_SETTINGS_BASE \
101 "nfsargs=setenv bootargs console=ttyS0,38400 root=/dev/nfs rw " \
102 "nfsroot=${serverip}:${rootpath}\0" \
103 "ramargs=setenv bootargs console=ttyS0,${baudrate} root=/dev/ram rw\0" \
104 "addip=setenv bootargs ${bootargs} " \
105 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
106 ":${hostname}:${netdev}:off panic=1\0" \
107 "flash_nfs=run nfsargs addip;" \
108 "bootm ${kernel_addr}\0" \
109 "flash_self=run ramargs addip;" \
110 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
111 "getkernel=tftpboot \$\(scratch\)\ \$\(bootfile\)\0" \
112 "bootargs=console=ttyS0,38400 root=/dev/nfs rw nfsroot=192.168.0.20:/export/rootfs ip=192.168.0.206:192.168.0.20:192.168.0.1:255.255.255.0:ax2000:eth0\0"
114 #if CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SRAM
115 #define CONFIG_EXTRA_ENV_SETTINGS_SELECT \
116 "net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0" \
117 "scratch=40200000\0" \
119 #elif CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SDRAM
120 #define CONFIG_EXTRA_ENV_SETTINGS_SELECT \
121 "net_nfs=tftp 60000000 ${bootfile};run nfsargs addip;bootm\0" \
122 "scratch=60800000\0" \
125 /* More than 4Mb is assumed when running from SDRAM */
126 #define CONFIG_EXTRA_ENV_SETTINGS_SELECT \
127 "net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0" \
128 "scratch=40800000\0" \
132 #define CONFIG_EXTRA_ENV_SETTINGS CONFIG_EXTRA_ENV_SETTINGS_BASE CONFIG_EXTRA_ENV_SETTINGS_SELECT
134 #define CONFIG_NETMASK 255.255.255.0
135 #define CONFIG_GATEWAYIP 192.168.0.1
136 #define CONFIG_SERVERIP 192.168.0.20
137 #define CONFIG_IPADDR 192.168.0.206
138 #define CONFIG_ROOTPATH /export/rootfs
139 #define CONFIG_HOSTNAME ax2000
140 #define CONFIG_BOOTFILE /uImage
142 #define CONFIG_BOOTCOMMAND "run flash_self"
147 * |--------------------------------|
148 * | 0x00000000 Text & Data & BSS | *
150 * | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~| *
151 * | UNUSED / Growth | * 256kb
152 * |--------------------------------|
153 * | 0x00050000 Base custom area | *
155 * | | * Rest of Flash
156 * |~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~|
157 * | END-0x00008000 Environment | * 32kb
158 * |--------------------------------|
162 * Main Memory (4Mb SRAM or XMb SDRAM):
163 * |--------------------------------|
164 * | UNUSED / scratch area |
169 * |--------------------------------|
170 * | Monitor .Text / .DATA / .BSS | * 256kb
172 * |--------------------------------|
173 * | Monitor Malloc | * 128kb (contains relocated environment)
174 * |--------------------------------|
175 * | Monitor/kernel STACK | * 64kb
176 * |--------------------------------|
177 * | Page Table for MMU systems | * 2k
178 * |--------------------------------|
179 * | PROM Code accessed from Linux | * 6kb-128b
180 * |--------------------------------|
181 * | Global data (avail from kernel)| * 128b
182 * |--------------------------------|
187 * Flash configuration (8,16 or 32 MB)
188 * TEXT base always at 0xFFF00000
189 * ENV_ADDR always at 0xFFF40000
190 * FLASH_BASE at 0xFC000000 for 64 MB
191 * 0xFE000000 for 32 MB
192 * 0xFF000000 for 16 MB
193 * 0xFF800000 for 8 MB
195 /*#define CFG_NO_FLASH 1*/
196 #define CFG_FLASH_BASE 0x00000000
197 #define CFG_FLASH_SIZE 0x00800000
199 #define PHYS_FLASH_SECT_SIZE 0x00020000 /* 128 KB sectors */
200 #define CFG_MAX_FLASH_SECT 64 /* max num of sects on one chip */
201 #define CFG_MAX_FLASH_BANKS 1 /* max num of memory banks */
203 #define CFG_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
204 #define CFG_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
205 #define CFG_FLASH_LOCK_TOUT 5 /* Timeout for Flash Set Lock Bit (in ms) */
206 #define CFG_FLASH_UNLOCK_TOUT 10000 /* Timeout for Flash Clear Lock Bits (in ms) */
207 #define CFG_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
210 #define CFG_FLASH_CFI_WIDTH FLASH_CFI_8BIT
211 #define CONFIG_FLASH_CFI_DRIVER
212 #define CFG_FLASH_CFI
213 /* Bypass cache when reading regs from flash memory */
214 #define CFG_FLASH_CFI_BYPASS_READ
215 /* Buffered writes (32byte/go) instead of single accesses */
216 #define CFG_FLASH_USE_BUFFER_WRITE
219 * Environment settings
221 /*#define CFG_ENV_IS_NOWHERE 1*/
222 #define CFG_ENV_IS_IN_FLASH 1
223 /* CFG_ENV_ADDR need to be at sector boundary */
224 #define CFG_ENV_SIZE 0x8000
225 #define CFG_ENV_SECT_SIZE 0x20000
226 #define CFG_ENV_ADDR (CFG_FLASH_BASE+CFG_FLASH_SIZE-CFG_ENV_SECT_SIZE)
227 #define CONFIG_ENV_OVERWRITE 1
232 * Always 4Mb SRAM available
233 * SDRAM module may be available on 0x60000000, SDRAM
234 * is configured as if a 128Mb SDRAM module is available.
237 #if CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SDRAM_NOSRAM
238 #define CFG_SDRAM_BASE 0x40000000
240 #define CFG_SDRAM_BASE 0x60000000
243 #define CFG_SDRAM_SIZE 0x08000000
244 #define CFG_SDRAM_END (CFG_SDRAM_BASE+CFG_SDRAM_SIZE)
246 /* 4Mb SRAM available */
247 #if CONFIG_LEON_RAM_SELECT != CONFIG_LEON_RAM_SDRAM_NOSRAM
248 #define CFG_SRAM_BASE 0x40000000
249 #define CFG_SRAM_SIZE 0x400000
250 #define CFG_SRAM_END (CFG_SRAM_BASE+CFG_SRAM_SIZE)
253 /* Select RAM used to run U-BOOT from... */
254 #if CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SRAM
255 #define CFG_RAM_BASE CFG_SRAM_BASE
256 #define CFG_RAM_SIZE CFG_SRAM_SIZE
257 #define CFG_RAM_END CFG_SRAM_END
259 #define CFG_RAM_BASE CFG_SDRAM_BASE
260 #define CFG_RAM_SIZE CFG_SDRAM_SIZE
261 #define CFG_RAM_END CFG_SDRAM_END
264 #define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
265 #define CFG_GBL_DATA_OFFSET (CFG_RAM_END - CFG_GBL_DATA_SIZE)
267 #define CFG_PROM_SIZE (8192-CFG_GBL_DATA_SIZE)
268 #define CFG_PROM_OFFSET (CFG_GBL_DATA_OFFSET-CFG_PROM_SIZE)
270 #define CFG_INIT_SP_OFFSET (CFG_PROM_OFFSET-32)
271 #define CFG_STACK_SIZE (0x10000-32)
273 #define CFG_MONITOR_BASE TEXT_BASE
274 #if (CFG_MONITOR_BASE < CFG_FLASH_BASE)
275 # define CFG_RAMBOOT 1
278 #define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
279 #define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
280 #define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
282 #define CFG_MALLOC_END (CFG_INIT_SP_OFFSET-CFG_STACK_SIZE)
283 #define CFG_MALLOC_BASE (CFG_MALLOC_END-CFG_MALLOC_LEN)
285 /* relocated monitor area */
286 #define CFG_RELOC_MONITOR_MAX_END CFG_MALLOC_BASE
287 #define CFG_RELOC_MONITOR_BASE (CFG_RELOC_MONITOR_MAX_END-CFG_MONITOR_LEN)
289 /* make un relocated address from relocated address */
290 #define UN_RELOC(address) (address-(CFG_RELOC_MONITOR_BASE-TEXT_BASE))
293 * Ethernet configuration uses on board SMC91C111
295 #define CONFIG_DRIVER_SMC91111 1
296 #define CONFIG_SMC91111_BASE 0x20000300 /* chip select 3 */
297 #define CONFIG_SMC_USE_32_BIT 1 /* 32 bit bus */
298 #undef CONFIG_SMC_91111_EXT_PHY /* we use internal phy */
299 /*#define CONFIG_SHOW_ACTIVITY*/
300 #define CONFIG_NET_RETRY_COUNT 10 /* # of retries */
302 #define CONFIG_ETHADDR 00:00:7a:cc:00:13
303 #define CONFIG_PHY_ADDR 0x00
306 * Miscellaneous configurable options
308 #define CFG_LONGHELP /* undef to save memory */
309 #define CFG_PROMPT "=> " /* Monitor Command Prompt */
310 #if defined(CONFIG_CMD_KGDB)
311 #define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
313 #define CFG_CBSIZE 256 /* Console I/O Buffer Size */
315 #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
316 #define CFG_MAXARGS 16 /* max number of command args */
317 #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
319 #define CFG_MEMTEST_START 0x00100000 /* memtest works on */
320 #define CFG_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
322 #define CFG_LOAD_ADDR 0x100000 /* default load address */
324 #define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
327 * Various low-level settings
330 /*-----------------------------------------------------------------------
332 *-----------------------------------------------------------------------
334 #define CONFIG_USB_CLOCK 0x0001BBBB
335 #define CONFIG_USB_CONFIG 0x00005000
337 /***** Gaisler GRLIB IP-Cores Config ********/
339 /* AMBA Plug & Play info display on startup */
340 /*#define CFG_AMBAPP_PRINT_ON_STARTUP*/
342 #define CFG_GRLIB_SDRAM 0
344 /* See, GRLIB Docs (grip.pdf) on how to set up
345 * These the memory controller registers.
347 #define CFG_GRLIB_MEMCFG1 (0x10f800ff | (1<<11))
348 #if CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SDRAM_NOSRAM
349 #define CFG_GRLIB_MEMCFG2 0x82206000
351 #define CFG_GRLIB_MEMCFG2 0x82205260
353 #define CFG_GRLIB_MEMCFG3 0x0809a000
355 #define CFG_GRLIB_FT_MEMCFG1 (0x10f800ff | (1<<11))
356 #if CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SDRAM_NOSRAM
357 #define CFG_GRLIB_FT_MEMCFG2 0x82206000
359 #define CFG_GRLIB_FT_MEMCFG2 0x82205260
361 #define CFG_GRLIB_FT_MEMCFG3 0x0809a000
363 /* no DDR controller */
364 #define CFG_GRLIB_DDR_CFG 0x00000000
366 /* no DDR2 Controller */
367 #define CFG_GRLIB_DDR2_CFG1 0x00000000
368 #define CFG_GRLIB_DDR2_CFG3 0x00000000
370 /* Calculate scaler register value from default baudrate */
371 #define CFG_GRLIB_APBUART_SCALER \
372 ((((CONFIG_SYS_CLK_FREQ*10)/(CONFIG_BAUDRATE*8))-5)/10)
374 /* Identification string */
375 #define CONFIG_IDENT_STRING "GAISLER LEON3 GR-CPCI-AX2000"
377 /* default kernel command line */
378 #define CONFIG_DEFAULT_KERNEL_COMMAND_LINE "console=ttyS0,38400\0\0"
380 #endif /* __CONFIG_H */