3 * ISEE 2007 SL, <www.iseebcn.com>
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License as
7 * published by the Free Software Foundation; either version 2 of
8 * the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 #include <asm/sizes.h>
26 * High Level Configuration Options
28 #define CONFIG_OMAP 1 /* in a TI OMAP core */
29 #define CONFIG_OMAP34XX 1 /* which is a 34XX */
30 #define CONFIG_OMAP3_IGEP0030 1 /* working with IGEP0030 */
32 #define CONFIG_SDRC /* The chip has SDRC controller */
34 #include <asm/arch/cpu.h>
35 #include <asm/arch/omap3.h>
38 * Display CPU and Board information
40 #define CONFIG_DISPLAY_CPUINFO 1
41 #define CONFIG_DISPLAY_BOARDINFO 1
44 #define V_OSCK 26000000 /* Clock output from T2 */
45 #define V_SCLK (V_OSCK >> 1)
47 #define CONFIG_MISC_INIT_R
49 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
50 #define CONFIG_SETUP_MEMORY_TAGS 1
51 #define CONFIG_INITRD_TAG 1
52 #define CONFIG_REVISION_TAG 1
54 #define CONFIG_OF_LIBFDT 1
57 * NS16550 Configuration
60 #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
62 #define CONFIG_SYS_NS16550
63 #define CONFIG_SYS_NS16550_SERIAL
64 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
65 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
67 /* select serial console configuration */
68 #define CONFIG_CONS_INDEX 3
69 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
70 #define CONFIG_SERIAL3 3
72 /* allow to overwrite serial and ethaddr */
73 #define CONFIG_ENV_OVERWRITE
74 #define CONFIG_BAUDRATE 115200
75 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, 115200}
76 #define CONFIG_GENERIC_MMC 1
78 #define CONFIG_OMAP_HSMMC 1
79 #define CONFIG_DOS_PARTITION 1
82 #define CONFIG_MUSB_UDC 1
83 #define CONFIG_USB_OMAP3 1
84 #define CONFIG_TWL4030_USB 1
86 /* USB device configuration */
87 #define CONFIG_USB_DEVICE 1
88 #define CONFIG_USB_TTY 1
89 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
91 /* Change these to suit your needs */
92 #define CONFIG_USBD_VENDORID 0x0451
93 #define CONFIG_USBD_PRODUCTID 0x5678
94 #define CONFIG_USBD_MANUFACTURER "Texas Instruments"
95 #define CONFIG_USBD_PRODUCT_NAME "IGEP"
97 /* commands to include */
98 #include <config_cmd_default.h>
100 #define CONFIG_CMD_CACHE
101 #define CONFIG_CMD_EXT2 /* EXT2 Support */
102 #define CONFIG_CMD_FAT /* FAT support */
103 #define CONFIG_CMD_I2C /* I2C serial bus support */
104 #define CONFIG_CMD_MMC /* MMC support */
105 #define CONFIG_CMD_ONENAND /* ONENAND support */
106 #define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */
107 #define CONFIG_MTD_DEVICE
109 #undef CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
110 #undef CONFIG_CMD_NFS /* nfs */
111 #undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
112 #undef CONFIG_CMD_IMLS /* List all found images */
114 #define CONFIG_SYS_NO_FLASH
115 #define CONFIG_HARD_I2C 1
116 #define CONFIG_SYS_I2C_SPEED 100000
117 #define CONFIG_SYS_I2C_SLAVE 1
118 #define CONFIG_SYS_I2C_BUS 0
119 #define CONFIG_SYS_I2C_BUS_SELECT 1
120 #define CONFIG_DRIVER_OMAP34XX_I2C 1
125 #define CONFIG_TWL4030_POWER 1
127 #define CONFIG_BOOTDELAY 3
129 #define CONFIG_EXTRA_ENV_SETTINGS \
131 "loadaddr=0x82000000\0" \
133 "console=ttyS2,115200n8\0" \
136 "dvimode=1024x768MR-16@60\0" \
137 "defaultdisplay=dvi\0" \
139 "mmcroot=/dev/mmcblk0p2 rw\0" \
140 "mmcrootfstype=ext3 rootwait\0" \
141 "nandroot=/dev/mtdblock4 rw\0" \
142 "nandrootfstype=jffs2\0" \
143 "mmcargs=setenv bootargs console=${console} " \
144 "mpurate=${mpurate} " \
146 "omapfb.mode=dvi:${dvimode} " \
148 "omapdss.def_disp=${defaultdisplay} " \
150 "rootfstype=${mmcrootfstype}\0" \
151 "nandargs=setenv bootargs console=${console} " \
152 "mpurate=${mpurate} " \
154 "omapfb.mode=dvi:${dvimode} " \
156 "omapdss.def_disp=${defaultdisplay} " \
157 "root=${nandroot} " \
158 "rootfstype=${nandrootfstype}\0" \
159 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
160 "bootscript=echo Running bootscript from mmc ...; " \
161 "source ${loadaddr}\0" \
162 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
163 "mmcboot=echo Booting from mmc ...; " \
165 "bootm ${loadaddr}\0" \
166 "nandboot=echo Booting from onenand ...; " \
168 "onenand read ${loadaddr} 280000 400000; " \
169 "bootm ${loadaddr}\0" \
171 #define CONFIG_BOOTCOMMAND \
172 "if mmc rescan ${mmcdev}; then " \
173 "if run loadbootscript; then " \
176 "if run loaduimage; then " \
178 "else run nandboot; " \
181 "else run nandboot; fi"
183 #define CONFIG_AUTO_COMPLETE 1
186 * Miscellaneous configurable options
188 #define CONFIG_SYS_LONGHELP /* undef to save memory */
189 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
190 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
191 #define CONFIG_SYS_PROMPT "U-Boot # "
192 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
193 /* Print Buffer Size */
194 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
195 sizeof(CONFIG_SYS_PROMPT) + 16)
196 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
197 /* Boot Argument Buffer Size */
198 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
200 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) /* memtest */
202 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
203 0x01F00000) /* 31MB */
205 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default */
208 #define CONFIG_SYS_MONITOR_LEN (256 << 10)
211 * OMAP3 has 12 GP timers, they can be driven by the system clock
212 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
213 * This rate is divided by a local divisor.
215 #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
216 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
217 #define CONFIG_SYS_HZ 1000
222 * The stack sizes are set up in start.S using the settings below
224 #define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */
227 * Physical Memory Map
230 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
231 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
232 #define PHYS_SDRAM_1_SIZE (32 << 20) /* at least 32 meg */
233 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
236 * FLASH and environment organization
239 #define PISMO1_ONEN_SIZE GPMC_SIZE_128M /* Configure the PISMO */
241 #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
243 #define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */
245 #define CONFIG_ENV_IS_IN_ONENAND 1
246 #define CONFIG_ENV_SIZE (512 << 10) /* Total Size Environment */
247 #define CONFIG_ENV_ADDR ONENAND_ENV_OFFSET
250 * Size of malloc() pool
252 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
254 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
255 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
256 #define CONFIG_SYS_INIT_RAM_SIZE 0x800
257 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
258 CONFIG_SYS_INIT_RAM_SIZE - \
259 GENERATED_GBL_DATA_SIZE)
261 #endif /* __CONFIG_H */