2 * Copyright (C) 2013, ISEE 2007 SL - http://www.isee.biz/
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation version 2.
8 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
9 * kind, whether express or implied; without even the implied warranty
10 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
14 #ifndef __CONFIG_IGEP0033_H
15 #define __CONFIG_IGEP0033_H
19 #define CONFIG_OMAP_COMMON
21 #include <asm/arch/omap.h>
24 #define MACH_TYPE_IGEP0033 4521 /* Until the next sync */
25 #define CONFIG_MACH_TYPE MACH_TYPE_IGEP0033
28 #define V_OSCK 24000000 /* Clock output from T2 */
29 #define V_SCLK (V_OSCK)
32 #define CONFIG_DMA_COHERENT
33 #define CONFIG_DMA_COHERENT_SIZE (1 << 20)
35 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
36 #define CONFIG_SYS_MALLOC_LEN (1024 << 10)
37 #define CONFIG_SYS_LONGHELP /* undef to save memory */
38 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
39 #define CONFIG_SYS_PROMPT "U-Boot# "
40 #define CONFIG_SYS_NO_FLASH
43 #define CONFIG_DISPLAY_CPUINFO
45 /* Commands to include */
46 #include <config_cmd_default.h>
48 #define CONFIG_CMD_ASKENV
49 #define CONFIG_CMD_BOOTZ
50 #define CONFIG_CMD_DHCP
51 #define CONFIG_CMD_ECHO
52 #define CONFIG_CMD_EXT4
53 #define CONFIG_CMD_FAT
54 #define CONFIG_CMD_FS_GENERIC
55 #define CONFIG_CMD_MMC
56 #define CONFIG_CMD_MTDPARTS
57 #define CONFIG_CMD_NAND
58 #define CONFIG_CMD_NET
59 #define CONFIG_CMD_PING
60 #define CONFIG_CMD_UBI
61 #define CONFIG_CMD_UBIFS
64 * Because the issues explained in doc/README.memory-test, the "mtest command
65 * is considered deprecated. It should not be enabled in most normal ports of
68 #undef CONFIG_CMD_MEMTEST
70 #define CONFIG_BOOTDELAY 1 /* negative for no autoboot */
71 #define CONFIG_ENV_VARS_UBOOT_CONFIG
72 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
73 #define CONFIG_EXTRA_ENV_SETTINGS \
74 "loadaddr=0x80200000\0" \
75 "rdaddr=0x81000000\0" \
76 "bootfile=/boot/uImage\0" \
77 "console=ttyO0,115200n8\0" \
80 "mmcroot=/dev/mmcblk0p2 rw\0" \
81 "mmcrootfstype=ext4 rootwait\0" \
82 "ramroot=/dev/ram0 rw ramdisk_size=65536 initrd=${rdaddr},64M\0" \
83 "ramrootfstype=ext2\0" \
84 "mmcargs=setenv bootargs console=${console} " \
87 "rootfstype=${mmcrootfstype}\0" \
88 "bootenv=uEnv.txt\0" \
89 "loadbootenv=load mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \
90 "importbootenv=echo Importing environment from mmc ...; " \
91 "env import -t $loadaddr $filesize\0" \
92 "ramargs=setenv bootargs console=${console} " \
95 "rootfstype=${ramrootfstype}\0" \
96 "loadramdisk=load mmc ${mmcdev} ${rdaddr} ramdisk.gz\0" \
97 "loaduimagefat=load mmc ${mmcdev} ${loadaddr} ${bootfile}\0" \
98 "loaduimage=load mmc ${mmcdev}:2 ${loadaddr} ${bootfile}\0" \
99 "mmcboot=echo Booting from mmc ...; " \
101 "bootm ${loadaddr}\0" \
102 "ramboot=echo Booting from ramdisk ...; " \
104 "bootm ${loadaddr}\0" \
106 #define CONFIG_BOOTCOMMAND \
107 "mmc dev ${mmcdev}; if mmc rescan; then " \
108 "echo SD/MMC found on device ${mmcdev};" \
109 "if run loadbootenv; then " \
110 "echo Loaded environment from ${bootenv};" \
111 "run importbootenv;" \
113 "if test -n $uenvcmd; then " \
114 "echo Running uenvcmd ...;" \
117 "if run loaduimage; then " \
122 /* Max number of command args */
123 #define CONFIG_SYS_MAXARGS 16
125 /* Console I/O Buffer Size */
126 #define CONFIG_SYS_CBSIZE 512
128 /* Print Buffer Size */
129 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \
130 + sizeof(CONFIG_SYS_PROMPT) + 16)
132 /* Boot Argument Buffer Size */
133 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
134 #define CONFIG_SYS_LOAD_ADDR 0x81000000 /* Default load address */
135 #define CONFIG_SYS_HZ 1000 /* 1ms clock */
137 /* Physical Memory Map */
138 #define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */
139 #define PHYS_DRAM_1 0x80000000 /* DRAM Bank #1 */
140 #define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */
142 #define CONFIG_SYS_SDRAM_BASE PHYS_DRAM_1
143 #define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \
144 GENERATED_GBL_DATA_SIZE)
145 /* Platform/Board specific defs */
146 #define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */
147 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
148 #define CONFIG_SYS_HZ 1000
150 /* NS16550 Configuration */
151 #define CONFIG_SYS_NS16550
152 #define CONFIG_SYS_NS16550_SERIAL
153 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
154 #define CONFIG_SYS_NS16550_CLK (48000000)
155 #define CONFIG_SYS_NS16550_COM1 0x44e09000 /* UART0 */
157 #define CONFIG_SERIAL_MULTI
158 #define CONFIG_CONS_INDEX 1
159 #define CONFIG_BAUDRATE 115200
162 #define CONFIG_ARCH_CPU_INIT
164 #define CONFIG_ENV_OVERWRITE 1
165 #define CONFIG_SYS_CONSOLE_INFO_QUIET
169 #define CONFIG_GENERIC_MMC
170 #define CONFIG_OMAP_HSMMC
171 #define CONFIG_DOS_PARTITION
174 #define CONFIG_OMAP_GPIO
176 /* Ethernet support */
177 #define CONFIG_DRIVER_TI_CPSW
179 #define CONFIG_BOOTP_DEFAULT
180 #define CONFIG_BOOTP_DNS
181 #define CONFIG_BOOTP_DNS2
182 #define CONFIG_BOOTP_SEND_HOSTNAME
183 #define CONFIG_BOOTP_GATEWAY
184 #define CONFIG_BOOTP_SUBNETMASK
185 #define CONFIG_NET_RETRY_COUNT 10
186 #define CONFIG_NET_MULTI
187 #define CONFIG_PHYLIB
188 #define CONFIG_PHY_ADDR 0
189 #define CONFIG_PHY_SMSC
193 #define CONFIG_NAND_OMAP_GPMC
194 #define GPMC_NAND_ECC_LP_x16_LAYOUT 1
195 #define CONFIG_SYS_NAND_BASE (0x08000000) /* phys address CS0 */
196 #define CONFIG_SYS_MAX_NAND_DEVICE 1
197 #define CONFIG_SYS_NAND_ONFI_DETECTION 1
198 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
199 #define CONFIG_ENV_IS_IN_NAND
200 #define CONFIG_ENV_OFFSET 0x260000 /* environment starts here */
202 #define CONFIG_MTD_PARTITIONS
203 #define CONFIG_MTD_DEVICE
204 #define CONFIG_RBTREE
207 #define MTDIDS_DEFAULT "nand0=nand"
208 #define MTDPARTS_DEFAULT "mtdparts=nand:512k(SPL),"\
209 "1m(U-Boot),128k(U-Boot Env),"\
210 "5m(Kernel),-(File System)"
212 /* Unsupported features */
213 #undef CONFIG_USE_IRQ
215 /* Defines for SPL */
217 #define CONFIG_SPL_FRAMEWORK
219 * Place the image at the start of the ROM defined image space.
220 * We limit our size to the ROM-defined downloaded image area, and use the
221 * rest of the space for stack.
223 #define CONFIG_SPL_TEXT_BASE 0x402F0400
224 #define CONFIG_SPL_MAX_SIZE (0x4030C000 - CONFIG_SPL_TEXT_BASE)
225 #define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR
227 #define CONFIG_SPL_BSS_START_ADDR 0x80000000
228 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
230 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
231 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
232 #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1
233 #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img"
234 #define CONFIG_SPL_MMC_SUPPORT
235 #define CONFIG_SPL_FAT_SUPPORT
236 #define CONFIG_SPL_LIBCOMMON_SUPPORT
237 #define CONFIG_SPL_LIBDISK_SUPPORT
238 #define CONFIG_SPL_LIBGENERIC_SUPPORT
239 #define CONFIG_SPL_SERIAL_SUPPORT
240 #define CONFIG_SPL_GPIO_SUPPORT
241 #define CONFIG_SPL_YMODEM_SUPPORT
242 #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds"
244 #define CONFIG_SPL_BOARD_INIT
245 #define CONFIG_SPL_NAND_AM33XX_BCH
246 #define CONFIG_SPL_NAND_SUPPORT
247 #define CONFIG_SPL_NAND_BASE
248 #define CONFIG_SPL_NAND_DRIVERS
249 #define CONFIG_SPL_NAND_ECC
250 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
251 #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
252 CONFIG_SYS_NAND_PAGE_SIZE)
253 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
254 #define CONFIG_SYS_NAND_OOBSIZE 64
255 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
256 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
257 #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \
258 10, 11, 12, 13, 14, 15, 16, 17, \
259 18, 19, 20, 21, 22, 23, 24, 25, \
260 26, 27, 28, 29, 30, 31, 32, 33, \
261 34, 35, 36, 37, 38, 39, 40, 41, \
262 42, 43, 44, 45, 46, 47, 48, 49, \
263 50, 51, 52, 53, 54, 55, 56, 57, }
265 #define CONFIG_SYS_NAND_ECCSIZE 512
266 #define CONFIG_SYS_NAND_ECCBYTES 14
268 #define CONFIG_SYS_NAND_ECCSTEPS 4
269 #define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * \
270 CONFIG_SYS_NAND_ECCSTEPS)
272 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
274 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
277 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
278 * 64 bytes before this address should be set aside for u-boot.img's
279 * header. That is 0x800FFFC0--0x80100000 should not be used for any
282 #define CONFIG_SYS_TEXT_BASE 0x80800000
283 #define CONFIG_SYS_SPL_MALLOC_START 0x80208000
284 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
287 * Since SPL did pll and ddr initialization for us,
288 * we don't need to do it twice.
290 #ifndef CONFIG_SPL_BUILD
291 #define CONFIG_SKIP_LOWLEVEL_INIT
294 #endif /* ! __CONFIG_IGEP0033_H */