3 * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
5 * Configuation settings for the IXDP425 board.
7 * See file CREDITS for list of people who contributed to this
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 * High Level Configuration Options
33 #define CONFIG_IXP425 1 /* This is an IXP425 CPU */
34 #define CONFIG_IXDP425 1 /* on an IXDP425 Board */
36 #define CONFIG_DISPLAY_CPUINFO 1 /* display cpu info (and speed) */
37 #define CONFIG_DISPLAY_BOARDINFO 1 /* display board info */
39 /***************************************************************
40 * U-boot generic defines start here.
41 ***************************************************************/
43 #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
46 * Size of malloc() pool
48 #define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
49 #define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
51 /* allow to overwrite serial and ethaddr */
52 #define CONFIG_ENV_OVERWRITE
54 #define CONFIG_BAUDRATE 115200
58 * Command line configuration.
60 #include <config_cmd_default.h>
62 #define CONFIG_CMD_ELF
63 #define CONFIG_CMD_PCI
67 #define CONFIG_NET_MULTI
68 #define CONFIG_EEPRO100
70 #define CONFIG_BOOTDELAY 3
71 /*#define CONFIG_ETHADDR 08:00:3e:26:0a:5b*/
72 #define CONFIG_NETMASK 255.255.255.0
73 #define CONFIG_IPADDR 192.168.0.21
74 #define CONFIG_SERVERIP 192.168.0.148
75 #define CONFIG_BOOTCOMMAND "bootm 50040000"
76 #define CONFIG_BOOTARGS "root=/dev/mtdblock2 rootfstype=cramfs console=ttyS0,115200"
77 #define CONFIG_CMDLINE_TAG
79 #if defined(CONFIG_CMD_KGDB)
80 #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
81 #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
85 * Miscellaneous configurable options
87 #define CFG_LONGHELP /* undef to save memory */
88 #define CFG_PROMPT "=> " /* Monitor Command Prompt */
89 #define CFG_CBSIZE 256 /* Console I/O Buffer Size */
90 #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
91 #define CFG_MAXARGS 16 /* max number of command args */
92 #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
94 #define CFG_MEMTEST_START 0x00400000 /* memtest works on */
95 #define CFG_MEMTEST_END 0x00800000 /* 4 ... 8 MB in DRAM */
97 #undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
99 #define CFG_LOAD_ADDR 0x00010000 /* default load address */
101 #define CFG_HZ 3333333 /* spec says 66.666 MHz, but it appears to be 33 */
102 /* valid baudrates */
103 #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
108 * The stack sizes are set up in start.S using the settings below
110 #define CONFIG_STACKSIZE (128*1024) /* regular stack */
111 #ifdef CONFIG_USE_IRQ
112 #define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
113 #define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
116 /***************************************************************
117 * Platform/Board specific defines start here.
118 ***************************************************************/
126 * select serial console configuration
128 #define CFG_IXP425_CONSOLE IXP425_UART1 /* we use UART1 for console */
131 * Physical Memory Map
133 #define CONFIG_NR_DRAM_BANKS 1 /* we have 2 banks of DRAM */
134 #define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */
135 #define PHYS_SDRAM_1_SIZE 0x01000000 /* 16 MB */
137 #define PHYS_FLASH_1 0x50000000 /* Flash Bank #1 */
138 #define PHYS_FLASH_SIZE 0x00800000 /* 8 MB */
139 #define PHYS_FLASH_BANK_SIZE 0x00800000 /* 8 MB Banks */
140 #define PHYS_FLASH_SECT_SIZE 0x00020000 /* 128 KB sectors (x1) */
142 #define CFG_DRAM_BASE 0x00000000
143 #define CFG_DRAM_SIZE 0x01000000
145 #define CFG_FLASH_BASE PHYS_FLASH_1
146 #define CFG_MONITOR_BASE CFG_FLASH_BASE
147 #define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
150 * Expansion bus settings
152 #define CFG_EXP_CS0 0xbcd23c42
157 #define CFG_SDR_CONFIG 0xd
158 #define CFG_SDR_MODE_CONFIG 0x1
159 #define CFG_SDRAM_REFRESH_CNT 0x81a
166 * FLASH and environment organization
169 * FLASH and environment organization
171 #define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
172 #define CFG_MAX_FLASH_SECT 128 /* max number of sectors on one chip */
174 #define CFG_FLASH_CFI /* The flash is CFI compatible */
175 #define CFG_FLASH_CFI_DRIVER /* Use common CFI driver */
176 #define CFG_ENV_IS_IN_FLASH 1
178 #define CFG_FLASH_BANKS_LIST { PHYS_FLASH_1 }
180 #define CFG_FLASH_CFI_WIDTH FLASH_CFI_16BIT /* no byte writes on IXP4xx */
182 #define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
183 #define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
185 #define CFG_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
187 #define CFG_ENV_SECT_SIZE 0x20000 /* size of one complete sector */
188 #define CFG_ENV_ADDR (PHYS_FLASH_1 + 0x20000)
189 #define CFG_ENV_SIZE 0x2000 /* Total Size of Environment Sector */
191 #endif /* __CONFIG_H */