git.sur5r.net Git - u-boot/blob - include/configs/kmp204x.h

   1 /*
   2  * (C) Copyright 2013 Keymile AG
   3  * Valentin Longchamp <valentin.longchamp@keymile.com>
   4  *
   5  * SPDX-License-Identifier:     GPL-2.0+
   6  */
   7
   8 #ifndef __CONFIG_H
   9 #define __CONFIG_H
  10
  11 /* KMLION1 */
  12 #if defined(CONFIG_KMLION1)
  13 #define CONFIG_HOSTNAME         kmlion1
  14 #define CONFIG_KM_BOARD_NAME    "kmlion1"
  15
  16 /* KMCOGE4 */
  17 #elif defined(CONFIG_KMCOGE4)
  18 #define CONFIG_HOSTNAME         kmcoge4
  19 #define CONFIG_KM_BOARD_NAME    "kmcoge4"
  20
  21 #else
  22 #error ("Board not supported")
  23 #endif
  24
  25 #define CONFIG_KMP204X
  26
  27 #include "km/kmp204x-common.h"
  28
  29 #if defined(CONFIG_KMLION1)
  30 /* App1 Local bus */
  31 #define CONFIG_SYS_LBAPP1_BASE          0xD0000000
  32 #define CONFIG_SYS_LBAPP1_BASE_PHYS     0xFD0000000ull
  33
  34 #define CONFIG_SYS_LBAPP1_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_LBAPP1_BASE_PHYS) \
  35                                 | BR_PS_8       /* Port Size 8 bits */ \
  36                                 | BR_DECC_OFF   /* no error corr */ \
  37                                 | BR_MS_GPCM    /* MSEL = GPCM */ \
  38                                 | BR_V)         /* valid */
  39
  40 #define CONFIG_SYS_LBAPP1_OR_PRELIM (OR_AM_256MB        /* length 256MB */ \
  41                                 | OR_GPCM_ACS_DIV2 /* LCS 1/2 clk after */ \
  42                                 | OR_GPCM_CSNT /* LCS 1/4 clk before */ \
  43                                 | OR_GPCM_SCY_2 /* 2 clk wait cycles */ \
  44                                 | OR_GPCM_TRLX /* relaxed tmgs */ \
  45                                 | OR_GPCM_EAD) /* extra bus clk cycles */
  46 /* Local bus app1 Base Address */
  47 #define CONFIG_SYS_BR2_PRELIM  CONFIG_SYS_LBAPP1_BR_PRELIM
  48 /* Local bus app1 Options */
  49 #define CONFIG_SYS_OR2_PRELIM  CONFIG_SYS_LBAPP1_OR_PRELIM
  50 #endif
  51
  52 /* App2 Local bus */
  53 #define CONFIG_SYS_LBAPP2_BASE          0xE0000000
  54 #define CONFIG_SYS_LBAPP2_BASE_PHYS     0xFE0000000ull
  55
  56 #define CONFIG_SYS_LBAPP2_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_LBAPP2_BASE_PHYS) \
  57                                 | BR_PS_8       /* Port Size 8 bits */ \
  58                                 | BR_DECC_OFF   /* no error corr */ \
  59                                 | BR_MS_GPCM    /* MSEL = GPCM */ \
  60                                 | BR_V)         /* valid */
  61
  62 #define CONFIG_SYS_LBAPP2_OR_PRELIM (OR_AM_256MB        /* length 256MB */ \
  63                                 | OR_GPCM_ACS_DIV2 /* LCS 1/2 clk after */ \
  64                                 | OR_GPCM_CSNT /* LCS 1/4 clk before */ \
  65                                 | OR_GPCM_SCY_2 /* 2 clk wait cycles */ \
  66                                 | OR_GPCM_TRLX /* relaxed tmgs */ \
  67                                 | OR_GPCM_EAD) /* extra bus clk cycles */
  68 /* Local bus app2 Base Address */
  69 #define CONFIG_SYS_BR3_PRELIM  CONFIG_SYS_LBAPP2_BR_PRELIM
  70 /* Local bus app2 Options */
  71 #define CONFIG_SYS_OR3_PRELIM  CONFIG_SYS_LBAPP2_OR_PRELIM
  72
  73 #endif  /* __CONFIG_H */