2 * K+P iMX6Q KP_IMX6Q_TPC board configuration
4 * Copyright (C) 2018 Lukasz Majewski <lukma@denx.de>
6 * SPDX-License-Identifier: GPL-2.0+
9 #ifndef __KP_IMX6Q_TPC_IMX6_CONFIG_H_
10 #define __KP_IMX6Q_TPC_IMX6_CONFIG_H_
12 #include <asm/arch/imx-regs.h>
14 #include "mx6_common.h"
17 #include "imx6_spl.h" /* common IMX6 SPL configuration */
19 /* Miscellaneous configurable options */
20 #define CONFIG_CMDLINE_TAG
21 #define CONFIG_SETUP_MEMORY_TAGS
22 #define CONFIG_INITRD_TAG
23 #define CONFIG_REVISION_TAG
25 #define CONFIG_BOUNCE_BUFFER
27 /* Size of malloc() pool */
28 #define CONFIG_SYS_MALLOC_LEN (4 * SZ_1M)
32 #define IMX_FEC_BASE ENET_BASE_ADDR
33 #define CONFIG_FEC_XCV_TYPE RGMII
34 #define CONFIG_ETHPRIME "FEC"
35 #define CONFIG_FEC_MXC_PHYADDR 0
36 #define CONFIG_ARP_TIMEOUT 200UL
39 #ifdef CONFIG_CMD_FUSE
40 #define CONFIG_MXC_OCOTP
44 #define CONFIG_SYS_I2C
45 #define CONFIG_SYS_I2C_MXC
46 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
47 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
48 #define CONFIG_SYS_I2C_SPEED 100000
51 #define CONFIG_FSL_ESDHC
52 #define CONFIG_FSL_USDHC
53 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
54 #define CONFIG_SYS_FSL_USDHC_NUM 2
55 #define CONFIG_SYS_MMC_ENV_DEV 1 /* 0 = SDHC2, 1 = SDHC4 (eMMC) */
58 #define CONFIG_MXC_UART
59 #define CONFIG_MXC_UART_BASE UART1_BASE
60 #define CONFIG_CONS_INDEX 1
61 #define CONFIG_BAUDRATE 115200
65 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
66 #define CONFIG_USB_HOST_ETHER
67 #define CONFIG_USB_ETHER_ASIX
68 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
69 #define CONFIG_MXC_USB_FLAGS 0
70 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 /* Enabled USB controller number */
74 #define CONFIG_HW_WATCHDOG
75 #define CONFIG_IMX_WATCHDOG
76 #define CONFIG_WATCHDOG_TIMEOUT_MSECS 60000
78 /* allow to overwrite serial and ethaddr */
79 #define CONFIG_ENV_OVERWRITE
81 #define CONFIG_LOADADDR 0x12000000
82 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
84 #ifndef CONFIG_SPL_BUILD
85 #define CONFIG_EXTRA_ENV_SETTINGS \
86 "console=ttymxc0,115200\0" \
87 "fdt_addr=0x18000000\0" \
88 "fdt_high=0xffffffff\0" \
89 "initrd_high=0xffffffff\0" \
90 "kernel_addr_r=0x10008000\0" \
91 "fdt_addr_r=0x13000000\0" \
92 "ramdisk_addr_r=0x18000000\0" \
93 "scriptaddr=0x14000000\0" \
94 "kernel_file=fitImage\0"\
95 "rdinit=/sbin/init\0" \
96 "addinitrd=setenv bootargs ${bootargs} rdinit=${rdinit} ${debug} \0" \
97 "fit_config=mx6q_tpc70_conf\0" \
99 "updargs=setenv bootargs console=${console} ${smp}"\
100 "rdinit=${rdinit} ${debug} ${displayargs}\0" \
101 "loadusb=usb start; " \
102 "fatload usb 0 ${loadaddr} ${upd_image}\0" \
103 "usbupd=echo Booting update from usb ...; " \
104 "setenv bootargs; " \
107 "bootm ${loadaddr}#${fit_config}\0" \
110 #define CONFIG_BOOTCOMMAND "run usbupd; run distro_bootcmd"
112 #define BOOT_TARGET_DEVICES(func) \
118 #include <config_distro_bootcmd.h>
121 /* Physical Memory Map */
122 #define CONFIG_NR_DRAM_BANKS 1
123 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
125 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
126 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
127 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
129 #define CONFIG_SYS_INIT_SP_OFFSET \
130 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
132 #define CONFIG_SYS_INIT_SP_ADDR \
133 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
136 #define CONFIG_ENV_SIZE (SZ_8K)
137 #define CONFIG_ENV_OFFSET 0x100000
138 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
139 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
141 #endif /* __KP_IMX6Q_TPC_IMX6_CONFIG_H_ */