3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4 * Marius Groeger <mgroeger@sysgo.de>
6 * Configuation settings for the LART board.
8 * See file CREDITS for list of people who contributed to this
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
31 * If we are developing, we might want to start armboot from ram
32 * so we MUST NOT initialize critical regs like mem-timing ...
34 #define CONFIG_INIT_CRITICAL /* undef for developing */
37 * High Level Configuration Options
40 #define CONFIG_SA1100 1 /* This is an SA1100 CPU */
41 #define CONFIG_LART 1 /* on an LART Board */
43 #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
46 * Size of malloc() pool
48 #define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
53 #define CONFIG_DRIVER_CS8900 1 /* we have a CS8900 on-board */
54 #define CS8900_BASE 0x20008300
55 #define CS8900_BUS16 1
58 * select serial console configuration
60 #define CONFIG_SERIAL3 1 /* we use SERIAL 3 on LART */
62 /* allow to overwrite serial and ethaddr */
63 #define CONFIG_ENV_OVERWRITE
65 #define CONFIG_BAUDRATE 9600
67 #define CONFIG_COMMANDS (CONFIG_CMD_DFL)
69 /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
70 #include <cmd_confdefs.h>
72 #define CONFIG_BOOTDELAY 3
73 #define CONFIG_BOOTARGS "root=ramfs devfs=mount console=ttySA0,9600"
74 #define CONFIG_ETHADDR 08:00:3e:26:0a:5b
75 #define CONFIG_NETMASK 255.255.0.0
76 #define CONFIG_IPADDR 172.22.2.131
77 #define CONFIG_SERVERIP 172.22.2.126
78 #define CONFIG_BOOTFILE "elinos-lart"
79 #define CONFIG_BOOTCOMMAND "tftp; bootm"
81 #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
82 #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
83 #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
87 * Miscellaneous configurable options
89 #define CFG_LONGHELP /* undef to save memory */
90 #define CFG_PROMPT "LART # " /* Monitor Command Prompt */
91 #define CFG_CBSIZE 256 /* Console I/O Buffer Size */
92 #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
93 #define CFG_MAXARGS 16 /* max number of command args */
94 #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
96 #define CFG_MEMTEST_START 0xc0400000 /* memtest works on */
97 #define CFG_MEMTEST_END 0xc0800000 /* 4 ... 8 MB in DRAM */
99 #undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
101 #define CFG_LOAD_ADDR 0xc8000000 /* default load address */
103 #define CFG_HZ 3686400 /* incrementer freq: 3.6864 MHz */
104 #define CFG_CPUSPEED 0x0b /* set core clock to 220 MHz */
106 /* valid baudrates */
107 #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
109 /*-----------------------------------------------------------------------
112 * The stack sizes are set up in start.S using the settings below
114 #define CONFIG_STACKSIZE (128*1024) /* regular stack */
115 #ifdef CONFIG_USE_IRQ
116 #define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
117 #define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
120 /*-----------------------------------------------------------------------
121 * Physical Memory Map
123 #define CONFIG_NR_DRAM_BANKS 4 /* we have 2 banks of DRAM */
124 #define PHYS_SDRAM_1 0xc0000000 /* SDRAM Bank #1 */
125 #define PHYS_SDRAM_1_SIZE 0x00800000 /* 8 MB */
126 #define PHYS_SDRAM_2 0xc1000000 /* SDRAM Bank #2 */
127 #define PHYS_SDRAM_2_SIZE 0x00800000 /* 8 MB */
128 #define PHYS_SDRAM_3 0xc8000000 /* SDRAM Bank #3 */
129 #define PHYS_SDRAM_3_SIZE 0x00800000 /* 8 MB */
130 #define PHYS_SDRAM_4 0xc9000000 /* SDRAM Bank #4 */
131 #define PHYS_SDRAM_4_SIZE 0x00800000 /* 8 MB */
134 #define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
135 #define PHYS_FLASH_SIZE 0x00400000 /* 4 MB */
137 #define CFG_FLASH_BASE PHYS_FLASH_1
139 /*-----------------------------------------------------------------------
140 * FLASH and environment organization
142 #define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
143 #define CFG_MAX_FLASH_SECT (31+8) /* max number of sectors on one chip */
145 /* timeout values are in ticks */
146 #define CFG_FLASH_ERASE_TOUT (2*CFG_HZ) /* Timeout for Flash Erase */
147 #define CFG_FLASH_WRITE_TOUT (2*CFG_HZ) /* Timeout for Flash Write */
149 #define CFG_ENV_IS_IN_FLASH 1
150 #define CFG_ENV_ADDR (PHYS_FLASH_1 + 0x1C000) /* Addr of Environment Sector */
151 #define CFG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */
153 #endif /* __CONFIG_H */