2 * ICP DAS LP-8x4x configuration file
4 * Copyright (C) 2013 Sergey Yanovich <ynvich@gmail.com>
6 * SPDX-License-Identifier: GPL-2.0+
13 * High Level Board Configuration Options
15 #define CONFIG_CPU_PXA27X /* Marvell PXA270 CPU */
16 #define MACH_TYPE_LP8X4X 4539 /* ICP DAS LP-8x4x */
17 #define CONFIG_MACH_TYPE MACH_TYPE_LP8X4X
18 #define CONFIG_SYS_TEXT_BASE 0x00000000
20 #define CONFIG_SYS_MALLOC_LEN (128*1024)
21 #define CONFIG_ARCH_CPU_INIT
22 #define CONFIG_BOOTCOMMAND \
23 "bootm 80000 - 240000;"
25 #define CONFIG_BOOTARGS \
26 "console=ttyS0,115200 mem=128M root=/dev/mmcblk0p1 rw" \
27 "init=/sbin/init rootfstype=ext4 rootwait"
29 #define CONFIG_TIMESTAMP
30 #define CONFIG_BOOTDELAY 2 /* Autoboot delay */
31 #define CONFIG_CMDLINE_TAG
32 #define CONFIG_SETUP_MEMORY_TAGS
33 #define CONFIG_LZMA /* LZMA compression support */
34 #define CONFIG_OF_LIBFDT
37 * Serial Console Configuration
39 #define CONFIG_PXA_SERIAL
40 #define CONFIG_FFUART 1
41 #define CONFIG_CONS_INDEX 3
42 #define CONFIG_BAUDRATE 115200
45 * Bootloader Components Configuration
47 #include <config_cmd_default.h>
49 #define CONFIG_CMD_ENV
50 #undef CONFIG_CMD_IMLS
51 #define CONFIG_CMD_MMC
52 #define CONFIG_CMD_USB
57 * Networking Configuration
58 * chip on the ICPDAS LINPAC board
61 #define CONFIG_CMD_PING
62 #define CONFIG_CMD_DHCP
64 #define CONFIG_DRIVER_DM9000 1
65 #define CONFIG_DM9000_BASE 0x0C000000
66 #define DM9000_IO 0x0C000000
67 #define DM9000_DATA 0x0C004000
68 #define DM9000_IO_2 0x0D000000
69 #define DM9000_DATA_2 0x0D004000
70 #define CONFIG_NET_RETRY_COUNT 10
72 #define CONFIG_BOOTP_BOOTFILESIZE
73 #define CONFIG_BOOTP_BOOTPATH
74 #define CONFIG_BOOTP_GATEWAY
75 #define CONFIG_BOOTP_HOSTNAME
79 * MMC Card Configuration
83 #define CONFIG_GENERIC_MMC
84 #define CONFIG_PXA_MMC_GENERIC
85 #define CONFIG_CMD_FAT
86 #define CONFIG_CMD_EXT2
87 #define CONFIG_DOS_PARTITION
93 #ifdef CONFIG_CMD_KGDB
94 #define CONFIG_KGDB_BAUDRATE 230400 /* kgdb serial port speed */
98 * HUSH Shell Configuration
100 #define CONFIG_SYS_HUSH_PARSER 1
102 #define CONFIG_SYS_LONGHELP
103 #ifdef CONFIG_SYS_HUSH_PARSER
104 #define CONFIG_SYS_PROMPT "$ "
107 #define CONFIG_SYS_CBSIZE 256
108 #define CONFIG_SYS_PBSIZE \
109 (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
110 #define CONFIG_SYS_MAXARGS 16
111 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
112 #define CONFIG_SYS_DEVICE_NULLDEV 1
113 #define CONFIG_CMDLINE_EDITING 1
114 #define CONFIG_AUTO_COMPLETE 1
119 #define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */
120 #define PHYS_SDRAM_1 0xa0000000 /* SDRAM Bank #1 */
121 #define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */
123 #define CONFIG_SYS_DRAM_BASE 0xa0000000 /* CS0 */
124 #define CONFIG_SYS_DRAM_SIZE 0x08000000 /* 128 MB DRAM */
126 #define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest works on */
127 #define CONFIG_SYS_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */
129 #define CONFIG_SYS_LOAD_ADDR 0xa0008000
130 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
131 /* Use first 64kb bank of the internal SRAM */
132 #define CONFIG_SYS_INIT_SP_ADDR 0x5c010000
137 #define CONFIG_SYS_MONITOR_BASE 0x0
138 #define CONFIG_SYS_MONITOR_LEN 0x40000
139 #define CONFIG_ENV_ADDR \
140 (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
141 #define CONFIG_ENV_SIZE 0x40000
142 #define CONFIG_ENV_SECT_SIZE 0x40000
144 #define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
145 #define PHYS_FLASH_2 0x04000000 /* Flash Bank #2 */
147 #define CONFIG_SYS_FLASH_CFI
148 #define CONFIG_FLASH_CFI_DRIVER 1
150 #define CONFIG_SYS_MAX_FLASH_SECT (4 + 255)
151 #define CONFIG_SYS_MAX_FLASH_BANKS 2
152 #define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1, PHYS_FLASH_2 }
154 #define CONFIG_SYS_FLASH_ERASE_TOUT (25*CONFIG_SYS_HZ)
155 #define CONFIG_SYS_FLASH_WRITE_TOUT (25*CONFIG_SYS_HZ)
157 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
158 #define CONFIG_SYS_FLASH_PROTECTION 1
160 #define CONFIG_ENV_IS_IN_FLASH 1
165 #define CONFIG_SYS_GPSR0_VAL 0x0808c014
166 #define CONFIG_SYS_GPSR1_VAL 0x00cf0002
167 #define CONFIG_SYS_GPSR2_VAL 0x0221c000
168 #define CONFIG_SYS_GPSR3_VAL 0x00020000
170 #define CONFIG_SYS_GPCR0_VAL 0x00000000
171 #define CONFIG_SYS_GPCR1_VAL 0x0000ab80
172 #define CONFIG_SYS_GPCR2_VAL 0x00100000
173 #define CONFIG_SYS_GPCR3_VAL 0x0
175 #define CONFIG_SYS_GPDR0_VAL 0xc0e9ddf4
176 #define CONFIG_SYS_GPDR1_VAL 0xfcffab83
177 #define CONFIG_SYS_GPDR2_VAL 0x02f1ffff
178 #define CONFIG_SYS_GPDR3_VAL 0x00021b81
180 #define CONFIG_SYS_GAFR0_L_VAL 0x80000000
181 #define CONFIG_SYS_GAFR0_U_VAL 0xa5e54018
182 #define CONFIG_SYS_GAFR1_L_VAL 0x999a955a
183 #define CONFIG_SYS_GAFR1_U_VAL 0xaaa5a00a
184 #define CONFIG_SYS_GAFR2_L_VAL 0xaaaaaaaa
185 #define CONFIG_SYS_GAFR2_U_VAL 0x55f9a402
186 #define CONFIG_SYS_GAFR3_L_VAL 0x540a950c
187 #define CONFIG_SYS_GAFR3_U_VAL 0x00001599
189 #define CONFIG_SYS_PSSR_VAL 0x32
194 #define CONFIG_SYS_CKEN 0x005002c0
195 #define CONFIG_SYS_CCCR 0x02000290
196 #define CONFIG_SYS_CLKCFG 0x0000000b
201 #define CONFIG_SYS_MSC0_VAL 0x2bd8aad2
202 #define CONFIG_SYS_MSC1_VAL 0xb8c9b8dc
203 #define CONFIG_SYS_MSC2_VAL 0xfff9b8c9
204 #define CONFIG_SYS_FLYCNFG_VAL 0x00010001
205 #define CONFIG_SYS_MDREFR_VAL 0x2093e018
206 #define CONFIG_SYS_MDCNFG_VAL 0x890009d1
207 #define CONFIG_SYS_MDMRS_VAL 0x00220022
208 #define CONFIG_SYS_SXCNFG_VAL 0x40044004
211 * PCMCIA and CF Interfaces
213 #define CONFIG_SYS_MECR_VAL 0x00000001
214 #define CONFIG_SYS_MCMEM0_VAL 0x0000c497
215 #define CONFIG_SYS_MCMEM1_VAL 0x0000c497
216 #define CONFIG_SYS_MCATT0_VAL 0x0000c497
217 #define CONFIG_SYS_MCATT1_VAL 0x0000c497
218 #define CONFIG_SYS_MCIO0_VAL 0x00008407
219 #define CONFIG_SYS_MCIO1_VAL 0x00008407
225 #define CONFIG_VOIPAC_LCD
231 #ifdef CONFIG_CMD_USB
232 #define CONFIG_USB_OHCI_NEW
233 #define CONFIG_SYS_USB_OHCI_BOARD_INIT
234 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
235 #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x4C000000
236 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "lp8x4x"
237 #define CONFIG_USB_STORAGE
240 #endif /* __CONFIG_H */