2 * Copyright 2016 Freescale Semiconductor
4 * SPDX-License-Identifier: GPL-2.0+
7 #ifndef __LS1012A_COMMON_H
8 #define __LS1012A_COMMON_H
10 #define CONFIG_FSL_LAYERSCAPE
11 #define CONFIG_FSL_LSCH2
14 #define CONFIG_SYS_HAS_SERDES
16 #include <asm/arch/config.h>
17 #define CONFIG_SYS_NO_FLASH
19 #define CONFIG_SUPPORT_RAW_INITRD
21 #define CONFIG_DISPLAY_BOARDINFO_LATE
23 #define CONFIG_SYS_TEXT_BASE 0x40100000
25 #define CONFIG_SYS_FSL_CLK
26 #define CONFIG_SYS_CLK_FREQ 100000000
27 #define CONFIG_DDR_CLK_FREQ 125000000
29 #define CONFIG_SKIP_LOWLEVEL_INIT
30 #define CONFIG_BOARD_EARLY_INIT_F 1
32 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0)
33 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000)
35 #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000
36 #define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0
37 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
39 /* Generic Timer Definitions */
40 #define COUNTER_FREQUENCY CONFIG_SYS_CLK_FREQ/4 /* 25MHz */
43 #define CONFIG_LAYERSCAPE_NS_ACCESS
45 /* Size of malloc() pool */
46 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024)
49 #ifdef CONFIG_QSPI_BOOT
50 #define CONFIG_SYS_QE_FW_IN_SPIFLASH
51 #define CONFIG_SYS_FMAN_FW_ADDR 0x400d0000
52 #define CONFIG_ENV_SPI_BUS 0
53 #define CONFIG_ENV_SPI_CS 0
54 #define CONFIG_ENV_SPI_MAX_HZ 1000000
55 #define CONFIG_ENV_SPI_MODE 0x03
56 #define CONFIG_SPI_FLASH_SPANSION
57 #define CONFIG_FSL_SPI_INTERFACE
58 #define CONFIG_SF_DATAFLASH
60 #define CONFIG_FSL_QSPI
61 #define QSPI0_AMBA_BASE 0x40000000
62 #define CONFIG_SPI_FLASH_SPANSION
63 #define CONFIG_SPI_FLASH_BAR
65 #define FSL_QSPI_FLASH_SIZE (1 << 24)
66 #define FSL_QSPI_FLASH_NUM 2
71 #define CONFIG_ENV_OVERWRITE
73 #define CONFIG_ENV_IS_IN_SPI_FLASH
74 #define CONFIG_ENV_SIZE 0x40000 /* 256KB */
75 #define CONFIG_ENV_OFFSET 0x200000 /* 2MB */
76 #define CONFIG_ENV_SECT_SIZE 0x40000
80 #define CONFIG_SYS_I2C
81 #define CONFIG_SYS_I2C_MXC
82 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
83 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
85 #define CONFIG_CONS_INDEX 1
86 #define CONFIG_SYS_NS16550_SERIAL
87 #define CONFIG_SYS_NS16550_REG_SIZE 1
88 #define CONFIG_SYS_NS16550_CLK (get_bus_freq(0)/2)
90 #define CONFIG_BAUDRATE 115200
91 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
93 /* Command line configuration */
94 #define CONFIG_CMD_ENV
95 #undef CONFIG_CMD_IMLS
97 #define CONFIG_ARCH_EARLY_INIT_R
99 #define CONFIG_SYS_HZ 1000
101 #define CONFIG_HWCONFIG
102 #define HWCONFIG_BUFFER_SIZE 128
104 #define CONFIG_DISPLAY_CPUINFO
106 /* Initial environment variables */
107 #define CONFIG_EXTRA_ENV_SETTINGS \
108 "initrd_high=0xffffffff\0" \
110 "hwconfig=fsl_ddr:bank_intlv=auto\0" \
111 "loadaddr=0x80100000\0" \
112 "kernel_addr=0x100000\0" \
113 "ramdisk_addr=0x800000\0" \
114 "ramdisk_size=0x2000000\0" \
115 "fdt_high=0xffffffffffffffff\0" \
116 "initrd_high=0xffffffffffffffff\0" \
117 "kernel_start=0xa00000\0" \
118 "kernel_load=0xa0000000\0" \
119 "kernel_size=0x2800000\0" \
120 "console=ttyAMA0,38400n8\0"
122 #define CONFIG_BOOTARGS "console=ttyS0,115200 root=/dev/ram0 " \
123 "earlycon=uart8250,mmio,0x21c0500"
124 #define CONFIG_BOOTCOMMAND "sf probe 0:0; sf read $kernel_load "\
125 "$kernel_start $kernel_size && "\
128 /* Monitor Command Prompt */
129 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
130 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
131 sizeof(CONFIG_SYS_PROMPT) + 16)
132 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot args buffer */
133 #define CONFIG_SYS_LONGHELP
134 #define CONFIG_CMDLINE_EDITING 1
135 #define CONFIG_AUTO_COMPLETE
136 #define CONFIG_SYS_MAXARGS 64 /* max command args */
138 #define CONFIG_PANIC_HANG
139 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
141 #include <asm/fsl_secure_boot.h>
143 #endif /* __LS1012A_COMMON_H */