2 * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
3 * on behalf of DENX Software Engineering GmbH
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License as
7 * published by the Free Software Foundation; either version 2 of
8 * the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 #include <asm/arch/regs-base.h>
28 #define CONFIG_MX28 /* i.MX28 SoC */
29 #define CONFIG_MXS_GPIO /* GPIO control */
30 #define CONFIG_SYS_HZ 1000 /* Ticks per second */
33 * Define M28EVK machine type by hand until it lands in mach-types
35 #define MACH_TYPE_M28EVK 3613
37 #define CONFIG_MACH_TYPE MACH_TYPE_M28EVK
39 #define CONFIG_SYS_NO_FLASH
40 #define CONFIG_SYS_ICACHE_OFF
41 #define CONFIG_SYS_DCACHE_OFF
42 #define CONFIG_BOARD_EARLY_INIT_F
43 #define CONFIG_ARCH_CPU_INIT
44 #define CONFIG_ARCH_MISC_INIT
46 #define CONFIG_OF_LIBFDT
52 #define CONFIG_SPL_NO_CPU_SUPPORT_CODE
53 #define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mx28"
54 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm926ejs/mx28/u-boot-spl.lds"
55 #define CONFIG_SPL_LIBCOMMON_SUPPORT
56 #define CONFIG_SPL_LIBGENERIC_SUPPORT
57 #define CONFIG_SPL_GPIO_SUPPORT
62 #include <config_cmd_default.h>
63 #define CONFIG_DISPLAY_CPUINFO
64 #define CONFIG_DOS_PARTITION
66 #define CONFIG_CMD_CACHE
67 #define CONFIG_CMD_DATE
68 #define CONFIG_CMD_DHCP
69 #define CONFIG_CMD_EEPROM
70 #define CONFIG_CMD_EXT2
71 #define CONFIG_CMD_FAT
72 #define CONFIG_CMD_GPIO
73 #define CONFIG_CMD_I2C
74 #define CONFIG_CMD_MII
75 #define CONFIG_CMD_MMC
76 #define CONFIG_CMD_NAND
77 #define CONFIG_CMD_NET
78 #define CONFIG_CMD_NFS
79 #define CONFIG_CMD_PING
80 #define CONFIG_CMD_SETEXPR
82 #define CONFIG_CMD_SPI
83 #define CONFIG_CMD_USB
86 * Memory configurations
88 #define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */
89 #define PHYS_SDRAM_1 0x40000000 /* Base address */
90 #define PHYS_SDRAM_1_SIZE 0x20000000 /* Max 512 MB RAM */
91 #define CONFIG_STACKSIZE 0x00010000 /* 128 KB stack */
92 #define CONFIG_SYS_MALLOC_LEN 0x00400000 /* 4 MB for malloc */
93 #define CONFIG_SYS_GBL_DATA_SIZE 128 /* Initial data */
94 #define CONFIG_SYS_MEMTEST_START 0x40000000 /* Memtest start adr */
95 #define CONFIG_SYS_MEMTEST_END 0x40400000 /* 4 MB RAM test */
96 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
97 /* Point initial SP in SRAM so SPL can use it too. */
99 #define CONFIG_SYS_INIT_RAM_ADDR 0x00000000
100 #define CONFIG_SYS_INIT_RAM_SIZE (128 * 1024)
102 #define CONFIG_SYS_INIT_SP_OFFSET \
103 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
104 #define CONFIG_SYS_INIT_SP_ADDR \
105 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
107 * We need to sacrifice first 4 bytes of RAM here to avoid triggering some
108 * strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot
109 * binary. In case there was more of this mess, 0x100 bytes are skipped.
111 #define CONFIG_SYS_TEXT_BASE 0x40000100
114 * U-Boot general configurations
116 #define CONFIG_SYS_LONGHELP
117 #define CONFIG_SYS_PROMPT "=> "
118 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */
119 #define CONFIG_SYS_PBSIZE \
120 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
121 /* Print buffer size */
122 #define CONFIG_SYS_MAXARGS 32 /* Max number of command args */
123 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
124 /* Boot argument buffer size */
125 #define CONFIG_VERSION_VARIABLE /* U-BOOT version */
126 #define CONFIG_AUTO_COMPLETE /* Command auto complete */
127 #define CONFIG_CMDLINE_EDITING /* Command history etc */
128 #define CONFIG_SYS_HUSH_PARSER
133 #define CONFIG_PL011_SERIAL
134 #define CONFIG_PL011_CLOCK 24000000
135 #define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE }
136 #define CONFIG_CONS_INDEX 0
137 #define CONFIG_BAUDRATE 115200 /* Default baud rate */
142 #ifdef CONFIG_CMD_MMC
144 #define CONFIG_MMC_BOUNCE_BUFFER
145 #define CONFIG_GENERIC_MMC
146 #define CONFIG_MXS_MMC
152 #define CONFIG_APBH_DMA
157 #define CONFIG_ENV_SIZE (16 * 1024)
158 #ifdef CONFIG_CMD_NAND
159 #define CONFIG_NAND_MXS
160 #define CONFIG_SYS_MAX_NAND_DEVICE 1
161 #define CONFIG_SYS_NAND_BASE 0x60000000
162 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
164 /* Environment is in NAND */
165 #define CONFIG_ENV_IS_IN_NAND
166 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
167 #define CONFIG_ENV_SECT_SIZE (128 * 1024)
168 #define CONFIG_ENV_RANGE (512 * 1024)
169 #define CONFIG_ENV_OFFSET 0x300000
170 #define CONFIG_ENV_OFFSET_REDUND \
171 (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE)
173 #define CONFIG_CMD_UBI
174 #define CONFIG_CMD_UBIFS
175 #define CONFIG_CMD_MTDPARTS
176 #define CONFIG_RBTREE
178 #define CONFIG_MTD_DEVICE
179 #define CONFIG_MTD_PARTITIONS
180 #define MTDIDS_DEFAULT "nand0=gpmi-nand.0"
181 #define MTDPARTS_DEFAULT \
182 "mtdparts=gpmi-nand.0:" \
183 "3m(bootloader)ro," \
184 "512k(environment)," \
185 "512k(redundant-environment)," \
189 #define CONFIG_ENV_IS_NOWHERE
193 * Ethernet on SOC (FEC)
195 #ifdef CONFIG_CMD_NET
196 #define CONFIG_ETHPRIME "FEC0"
197 #define CONFIG_FEC_MXC
198 #define CONFIG_FEC_MXC_MULTI
200 #define CONFIG_DISCOVER_PHY
201 #define CONFIG_FEC_XCV_TYPE RMII
207 #ifdef CONFIG_CMD_I2C
208 #define CONFIG_I2C_MXS
209 #define CONFIG_HARD_I2C
210 #define CONFIG_SYS_I2C_SPEED 400000
216 #ifdef CONFIG_CMD_EEPROM
217 #define CONFIG_SYS_I2C_MULTI_EEPROMS
218 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
224 #ifdef CONFIG_CMD_DATE
225 /* Use the internal RTC in the MXS chip */
226 #define CONFIG_RTC_INTERNAL
227 #ifdef CONFIG_RTC_INTERNAL
228 #define CONFIG_RTC_MXS
230 #define CONFIG_RTC_M41T62
231 #define CONFIG_SYS_I2C_RTC_ADDR 0x68
232 #define CONFIG_SYS_M41T11_BASE_YEAR 2000
239 #ifdef CONFIG_CMD_USB
240 #define CONFIG_USB_EHCI
241 #define CONFIG_USB_EHCI_MXS
242 #define CONFIG_EHCI_MXS_PORT 1
243 #define CONFIG_EHCI_IS_TDI
244 #define CONFIG_USB_STORAGE
250 #ifdef CONFIG_CMD_SPI
251 #define CONFIG_HARD_SPI
252 #define CONFIG_MXS_SPI
253 #define CONFIG_SPI_HALF_DUPLEX
254 #define CONFIG_DEFAULT_SPI_BUS 2
255 #define CONFIG_DEFAULT_SPI_MODE SPI_MODE_0
259 #define CONFIG_SPI_FLASH
260 #define CONFIG_SPI_FLASH_STMICRO
261 #define CONFIG_SF_DEFAULT_CS 2
262 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
263 #define CONFIG_SF_DEFAULT_SPEED 24000000
265 #define CONFIG_ENV_SPI_CS 0
266 #define CONFIG_ENV_SPI_BUS 2
267 #define CONFIG_ENV_SPI_MAX_HZ 24000000
268 #define CONFIG_ENV_SPI_MODE SPI_MODE_0
275 #define CONFIG_CMDLINE_TAG
276 #define CONFIG_SETUP_MEMORY_TAGS
277 #define CONFIG_BOOTDELAY 3
278 #define CONFIG_BOOTFILE "uImage"
279 #define CONFIG_BOOTARGS "console=ttyAM0,115200n8 "
280 #define CONFIG_BOOTCOMMAND "run bootcmd_net"
281 #define CONFIG_LOADADDR 0x42000000
282 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
283 #define CONFIG_OF_LIBFDT
288 #define CONFIG_EXTRA_ENV_SETTINGS \
289 "update_nand_full_filename=u-boot.nand\0" \
290 "update_nand_firmware_filename=u-boot.sb\0" \
291 "update_sd_firmware_filename=u-boot.sd\0" \
292 "update_nand_firmware_maxsz=0x100000\0" \
293 "update_nand_stride=0x40\0" /* MX28 datasheet ch. 12.12 */ \
294 "update_nand_count=0x4\0" /* MX28 datasheet ch. 12.12 */ \
295 "update_nand_get_fcb_size=" /* Get size of FCB blocks */ \
298 "setexpr fcb_sz ${update_nand_stride} * ${update_nand_count};" \
299 "setexpr update_nand_fcb ${fcb_sz} * ${nand_writesize}\0" \
300 "update_nand_full=" /* Update FCB, DBBT and FW */ \
301 "if tftp ${update_nand_full_filename} ; then " \
302 "run update_nand_get_fcb_size ; " \
303 "nand scrub -y 0x0 ${filesize} ; " \
304 "nand write.raw ${loadaddr} 0x0 ${update_nand_fcb} ; " \
305 "setexpr update_off ${loadaddr} + ${update_nand_fcb} ; " \
306 "setexpr update_sz ${filesize} - ${update_nand_fcb} ; " \
307 "nand write ${update_off} ${update_nand_fcb} ${update_sz} ; " \
309 "update_nand_firmware=" /* Update only firmware */ \
310 "if tftp ${update_nand_firmware_filename} ; then " \
311 "run update_nand_get_fcb_size ; " \
312 "setexpr fcb_sz ${update_nand_fcb} * 2 ; " /* FCB + DBBT */ \
313 "setexpr fw_sz ${update_nand_firmware_maxsz} * 2 ; " \
314 "setexpr fw_off ${fcb_sz} + ${update_nand_firmware_maxsz};" \
315 "nand erase ${fcb_sz} ${fw_sz} ; " \
316 "nand write ${loadaddr} ${fcb_sz} ${filesize} ; " \
317 "nand write ${loadaddr} ${fw_off} ${filesize} ; " \
319 "update_sd_firmware=" /* Update the SD firmware partition */ \
320 "if mmc rescan ; then " \
321 "if tftp ${update_sd_firmware_filename} ; then " \
322 "setexpr fw_sz ${filesize} / 0x200 ; " /* SD block size */ \
323 "setexpr fw_sz ${fw_sz} + 1 ; " \
324 "mmc write ${loadaddr} 0x800 ${fw_sz} ; " \
328 #endif /* __M28_H__ */