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[u-boot] / include / configs / m28evk.h
1 /*
2  * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
3  * on behalf of DENX Software Engineering GmbH
4  *
5  * This program is free software; you can redistribute it and/or
6  * modify it under the terms of the GNU General Public License as
7  * published by the Free Software Foundation; either version 2 of
8  * the License, or (at your option) any later version.
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  *
15  * You should have received a copy of the GNU General Public License
16  * along with this program; if not, write to the Free Software
17  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
18  * MA 02111-1307 USA
19  */
20 #ifndef __M28EVK_CONFIG_H__
21 #define __M28EVK_CONFIG_H__
22
23 /*
24  * SoC configurations
25  */
26 #define CONFIG_MX28                             /* i.MX28 SoC */
27 #define CONFIG_MXS_GPIO                         /* GPIO control */
28 #define CONFIG_SYS_HZ           1000            /* Ticks per second */
29
30 /*
31  * Define M28EVK machine type by hand until it lands in mach-types
32  */
33 #define MACH_TYPE_M28EVK        3613
34
35 #define CONFIG_MACH_TYPE        MACH_TYPE_M28EVK
36
37 #include <asm/arch/regs-base.h>
38
39 #define CONFIG_SYS_NO_FLASH
40 #define CONFIG_BOARD_EARLY_INIT_F
41 #define CONFIG_ARCH_MISC_INIT
42
43 /*
44  * SPL
45  */
46 #define CONFIG_SPL
47 #define CONFIG_SPL_NO_CPU_SUPPORT_CODE
48 #define CONFIG_SPL_START_S_PATH         "arch/arm/cpu/arm926ejs/mxs"
49 #define CONFIG_SPL_LDSCRIPT     "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds"
50 #define CONFIG_SPL_LIBCOMMON_SUPPORT
51 #define CONFIG_SPL_LIBGENERIC_SUPPORT
52 #define CONFIG_SPL_GPIO_SUPPORT
53
54 /*
55  * U-Boot Commands
56  */
57 #include <config_cmd_default.h>
58 #define CONFIG_DISPLAY_CPUINFO
59 #define CONFIG_DOS_PARTITION
60
61 #define CONFIG_CMD_CACHE
62 #define CONFIG_CMD_DATE
63 #define CONFIG_CMD_DHCP
64 #define CONFIG_CMD_EEPROM
65 #define CONFIG_CMD_EXT2
66 #define CONFIG_CMD_FAT
67 #define CONFIG_CMD_GPIO
68 #define CONFIG_CMD_GREPENV
69 #define CONFIG_CMD_I2C
70 #define CONFIG_CMD_MII
71 #define CONFIG_CMD_MMC
72 #define CONFIG_CMD_NAND
73 #define CONFIG_CMD_NET
74 #define CONFIG_CMD_NFS
75 #define CONFIG_CMD_PING
76 #define CONFIG_CMD_SETEXPR
77 #define CONFIG_CMD_SF
78 #define CONFIG_CMD_SPI
79 #define CONFIG_CMD_USB
80
81 #define CONFIG_REGEX                    /* Enable regular expression support */
82
83 /*
84  * Memory configurations
85  */
86 #define CONFIG_NR_DRAM_BANKS            1               /* 1 bank of DRAM */
87 #define PHYS_SDRAM_1                    0x40000000      /* Base address */
88 #define PHYS_SDRAM_1_SIZE               0x20000000      /* Max 512 MB RAM */
89 #define CONFIG_SYS_MALLOC_LEN           0x00400000      /* 4 MB for malloc */
90 #define CONFIG_SYS_GBL_DATA_SIZE        128             /* Initial data */
91 #define CONFIG_SYS_MEMTEST_START        0x40000000      /* Memtest start adr */
92 #define CONFIG_SYS_MEMTEST_END          0x40400000      /* 4 MB RAM test */
93 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
94 /* Point initial SP in SRAM so SPL can use it too. */
95
96 #define CONFIG_SYS_INIT_RAM_ADDR        0x00000000
97 #define CONFIG_SYS_INIT_RAM_SIZE        (128 * 1024)
98
99 #define CONFIG_SYS_INIT_SP_OFFSET \
100         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
101 #define CONFIG_SYS_INIT_SP_ADDR \
102         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
103 /*
104  * We need to sacrifice first 4 bytes of RAM here to avoid triggering some
105  * strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot
106  * binary. In case there was more of this mess, 0x100 bytes are skipped.
107  */
108 #define CONFIG_SYS_TEXT_BASE            0x40000100
109
110 /*
111  * U-Boot general configurations
112  */
113 #define CONFIG_SYS_LONGHELP
114 #define CONFIG_SYS_PROMPT       "=> "
115 #define CONFIG_SYS_CBSIZE       1024            /* Console I/O buffer size */
116 #define CONFIG_SYS_PBSIZE       \
117         (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
118                                                 /* Print buffer size */
119 #define CONFIG_SYS_MAXARGS      32              /* Max number of command args */
120 #define CONFIG_SYS_BARGSIZE     CONFIG_SYS_CBSIZE
121                                                 /* Boot argument buffer size */
122 #define CONFIG_VERSION_VARIABLE                 /* U-BOOT version */
123 #define CONFIG_AUTO_COMPLETE                    /* Command auto complete */
124 #define CONFIG_CMDLINE_EDITING                  /* Command history etc */
125 #define CONFIG_SYS_HUSH_PARSER
126
127 /*
128  * Serial Driver
129  */
130 #define CONFIG_PL011_SERIAL
131 #define CONFIG_PL011_CLOCK              24000000
132 #define CONFIG_PL01x_PORTS              { (void *)MXS_UARTDBG_BASE }
133 #define CONFIG_CONS_INDEX               0
134 #define CONFIG_BAUDRATE                 115200  /* Default baud rate */
135
136 /*
137  * MMC Driver
138  */
139 #ifdef  CONFIG_CMD_MMC
140 #define CONFIG_MMC
141 #define CONFIG_BOUNCE_BUFFER
142 #define CONFIG_GENERIC_MMC
143 #define CONFIG_MXS_MMC
144 #endif
145
146 /*
147  * APBH DMA
148  */
149 #define CONFIG_APBH_DMA
150
151 /*
152  * NAND
153  */
154 #define CONFIG_ENV_SIZE                 (16 * 1024)
155 #ifdef  CONFIG_CMD_NAND
156 #define CONFIG_NAND_MXS
157 #define CONFIG_SYS_MAX_NAND_DEVICE      1
158 #define CONFIG_SYS_NAND_BASE            0x60000000
159 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
160
161 /* Environment is in NAND */
162 #define CONFIG_ENV_IS_IN_NAND
163 #define CONFIG_ENV_SIZE_REDUND          CONFIG_ENV_SIZE
164 #define CONFIG_ENV_SECT_SIZE            (128 * 1024)
165 #define CONFIG_ENV_RANGE                (512 * 1024)
166 #define CONFIG_ENV_OFFSET               0x300000
167 #define CONFIG_ENV_OFFSET_REDUND        \
168                 (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE)
169
170 #define CONFIG_CMD_UBI
171 #define CONFIG_CMD_UBIFS
172 #define CONFIG_CMD_MTDPARTS
173 #define CONFIG_RBTREE
174 #define CONFIG_LZO
175 #define CONFIG_MTD_DEVICE
176 #define CONFIG_MTD_PARTITIONS
177 #define MTDIDS_DEFAULT                  "nand0=gpmi-nand"
178 #define MTDPARTS_DEFAULT                        \
179         "mtdparts=gpmi-nand:"                   \
180                 "3m(bootloader)ro,"             \
181                 "512k(environment),"            \
182                 "512k(redundant-environment),"  \
183                 "4m(kernel),"                   \
184                 "128k(fdt),"                    \
185                 "8m(ramdisk),"                  \
186                 "-(filesystem)"
187 #else
188 #define CONFIG_ENV_IS_NOWHERE
189 #endif
190
191 /*
192  * Ethernet on SOC (FEC)
193  */
194 #ifdef  CONFIG_CMD_NET
195 #define CONFIG_ETHPRIME                 "FEC0"
196 #define CONFIG_FEC_MXC
197 #define CONFIG_MII
198 #define CONFIG_FEC_XCV_TYPE             RMII
199 #endif
200
201 /*
202  * I2C
203  */
204 #ifdef  CONFIG_CMD_I2C
205 #define CONFIG_I2C_MXS
206 #define CONFIG_HARD_I2C
207 #define CONFIG_SYS_I2C_SPEED            400000
208 #endif
209
210 /*
211  * EEPROM
212  */
213 #ifdef  CONFIG_CMD_EEPROM
214 #define CONFIG_SYS_I2C_MULTI_EEPROMS
215 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN  2
216 #endif
217
218 /*
219  * RTC
220  */
221 #ifdef  CONFIG_CMD_DATE
222 /* Use the internal RTC in the MXS chip */
223 #define CONFIG_RTC_INTERNAL
224 #ifdef  CONFIG_RTC_INTERNAL
225 #define CONFIG_RTC_MXS
226 #else
227 #define CONFIG_RTC_M41T62
228 #define CONFIG_SYS_I2C_RTC_ADDR         0x68
229 #define CONFIG_SYS_M41T11_BASE_YEAR     2000
230 #endif
231 #endif
232
233 /*
234  * USB
235  */
236 #ifdef  CONFIG_CMD_USB
237 #define CONFIG_USB_EHCI
238 #define CONFIG_USB_EHCI_MXS
239 #define CONFIG_EHCI_MXS_PORT0
240 #define CONFIG_EHCI_MXS_PORT1
241 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
242 #define CONFIG_EHCI_IS_TDI
243 #define CONFIG_USB_STORAGE
244 #endif
245
246 /*
247  * SPI
248  */
249 #ifdef  CONFIG_CMD_SPI
250 #define CONFIG_HARD_SPI
251 #define CONFIG_MXS_SPI
252 #define CONFIG_SPI_HALF_DUPLEX
253 #define CONFIG_DEFAULT_SPI_BUS          2
254 #define CONFIG_DEFAULT_SPI_CS           0
255 #define CONFIG_DEFAULT_SPI_MODE         SPI_MODE_0
256
257 /* SPI FLASH */
258 #ifdef  CONFIG_CMD_SF
259 #define CONFIG_SPI_FLASH
260 #define CONFIG_SPI_FLASH_STMICRO
261 #define CONFIG_SF_DEFAULT_BUS           2
262 #define CONFIG_SF_DEFAULT_CS            0
263 #define CONFIG_SF_DEFAULT_SPEED         40000000
264 #define CONFIG_SF_DEFAULT_MODE          SPI_MODE_0
265
266 #define CONFIG_ENV_SPI_BUS              2
267 #define CONFIG_ENV_SPI_CS               0
268 #define CONFIG_ENV_SPI_MAX_HZ           40000000
269 #define CONFIG_ENV_SPI_MODE             SPI_MODE_0
270 #endif
271 #endif
272
273 /*
274  * Boot Linux
275  */
276 #define CONFIG_CMDLINE_TAG
277 #define CONFIG_SETUP_MEMORY_TAGS
278 #define CONFIG_BOOTDELAY        3
279 #define CONFIG_BOOTFILE         "uImage"
280 #define CONFIG_BOOTARGS         "console=ttyAMA0,115200n8 "
281 #define CONFIG_BOOTCOMMAND      "run bootcmd_net"
282 #define CONFIG_LOADADDR         0x42000000
283 #define CONFIG_SYS_LOAD_ADDR    CONFIG_LOADADDR
284 #define CONFIG_OF_LIBFDT
285
286 /*
287  * Extra Environments
288  */
289 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
290         "update_nand_full_filename=u-boot.nand\0"                       \
291         "update_nand_firmware_filename=u-boot.sb\0"                     \
292         "update_sd_firmware_filename=u-boot.sd\0"                       \
293         "update_nand_firmware_maxsz=0x100000\0"                         \
294         "update_nand_stride=0x40\0"     /* MX28 datasheet ch. 12.12 */  \
295         "update_nand_count=0x4\0"       /* MX28 datasheet ch. 12.12 */  \
296         "update_nand_get_fcb_size="     /* Get size of FCB blocks */    \
297                 "nand device 0 ; "                                      \
298                 "nand info ; "                                          \
299                 "setexpr fcb_sz ${update_nand_stride} * ${update_nand_count};" \
300                 "setexpr update_nand_fcb ${fcb_sz} * ${nand_writesize}\0" \
301         "update_nand_full="             /* Update FCB, DBBT and FW */   \
302                 "if tftp ${update_nand_full_filename} ; then "          \
303                 "run update_nand_get_fcb_size ; "                       \
304                 "nand scrub -y 0x0 ${filesize} ; "                      \
305                 "nand write.raw ${loadaddr} 0x0 ${fcb_sz} ; "   \
306                 "setexpr update_off ${loadaddr} + ${update_nand_fcb} ; " \
307                 "setexpr update_sz ${filesize} - ${update_nand_fcb} ; " \
308                 "nand write ${update_off} ${update_nand_fcb} ${update_sz} ; " \
309                 "fi\0"                                                  \
310         "update_nand_firmware="         /* Update only firmware */      \
311                 "if tftp ${update_nand_firmware_filename} ; then "      \
312                 "run update_nand_get_fcb_size ; "                       \
313                 "setexpr fcb_sz ${update_nand_fcb} * 2 ; " /* FCB + DBBT */ \
314                 "setexpr fw_sz ${update_nand_firmware_maxsz} * 2 ; "    \
315                 "setexpr fw_off ${fcb_sz} + ${update_nand_firmware_maxsz};" \
316                 "nand erase ${fcb_sz} ${fw_sz} ; "                      \
317                 "nand write ${loadaddr} ${fcb_sz} ${filesize} ; "       \
318                 "nand write ${loadaddr} ${fw_off} ${filesize} ; "       \
319                 "fi\0"                                                  \
320         "update_sd_firmware="           /* Update the SD firmware partition */ \
321                 "if mmc rescan ; then "                                 \
322                 "if tftp ${update_sd_firmware_filename} ; then "        \
323                 "setexpr fw_sz ${filesize} / 0x200 ; "  /* SD block size */ \
324                 "setexpr fw_sz ${fw_sz} + 1 ; "                         \
325                 "mmc write ${loadaddr} 0x800 ${fw_sz} ; "               \
326                 "fi ; "                                                 \
327                 "fi\0"
328
329 #endif /* __M28EVK_CONFIG_H__ */