2 * Aries M53 configuration
3 * Copyright (C) 2012-2013 Marek Vasut <marex@denx.de>
5 * SPDX-License-Identifier: GPL-2.0+
8 #ifndef __M53EVK_CONFIG_H__
9 #define __M53EVK_CONFIG_H__
11 #include <asm/arch/imx-regs.h>
13 #define CONFIG_REVISION_TAG
14 #define CONFIG_SYS_FSL_CLK
16 #define CONFIG_TIMESTAMP /* Print image info with timestamp */
19 * Memory configurations
21 #define CONFIG_NR_DRAM_BANKS 2
22 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
23 #define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size)
24 #define PHYS_SDRAM_2 CSD1_BASE_ADDR
25 #define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size)
26 #define PHYS_SDRAM_SIZE (gd->ram_size)
27 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
28 #define CONFIG_SYS_MEMTEST_START 0x70000000
29 #define CONFIG_SYS_MEMTEST_END 0x8ff00000
31 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
32 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
33 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
35 #define CONFIG_SYS_INIT_SP_OFFSET \
36 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
37 #define CONFIG_SYS_INIT_SP_ADDR \
38 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
41 * U-Boot general configurations
43 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */
44 #define CONFIG_SYS_MAXARGS 32 /* Max number of command args */
45 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
46 /* Boot argument buffer size */
51 #define CONFIG_MXC_UART
52 #define CONFIG_MXC_UART_BASE UART2_BASE
58 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
59 #define CONFIG_SYS_FSL_ESDHC_NUM 1
65 #define CONFIG_ENV_SIZE (16 * 1024)
66 #ifdef CONFIG_CMD_NAND
67 #define CONFIG_SYS_MAX_NAND_DEVICE 1
68 #define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR_AXI
69 #define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR_AXI
70 #define CONFIG_MXC_NAND_IP_REGS_BASE NFC_BASE_ADDR
71 #define CONFIG_SYS_NAND_LARGEPAGE
72 #define CONFIG_MXC_NAND_HWECC
73 #define CONFIG_SYS_NAND_USE_FLASH_BBT
75 /* Environment is in NAND */
76 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
77 #define CONFIG_ENV_SECT_SIZE (128 * 1024)
78 #define CONFIG_ENV_RANGE (4 * CONFIG_ENV_SECT_SIZE)
79 #define CONFIG_ENV_OFFSET (8 * CONFIG_ENV_SECT_SIZE) /* 1 MiB */
80 #define CONFIG_ENV_OFFSET_REDUND \
81 (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE)
83 #define CONFIG_MTD_DEVICE
84 #define CONFIG_MTD_PARTITIONS
88 * Ethernet on SOC (FEC)
91 #define CONFIG_FEC_MXC
92 #define IMX_FEC_BASE FEC_BASE_ADDR
93 #define CONFIG_FEC_MXC_PHYADDR 0x0
95 #define CONFIG_DISCOVER_PHY
96 #define CONFIG_FEC_XCV_TYPE RMII
97 #define CONFIG_ETHPRIME "FEC0"
103 #ifdef CONFIG_CMD_I2C
104 #define CONFIG_SYS_I2C
105 #define CONFIG_SYS_I2C_MXC
106 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
107 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
108 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
109 #define CONFIG_SYS_RTC_BUS_NUM 1 /* I2C2 */
115 #ifdef CONFIG_CMD_DATE
116 #define CONFIG_RTC_M41T62
117 #define CONFIG_SYS_I2C_RTC_ADDR 0x68
118 #define CONFIG_SYS_M41T11_BASE_YEAR 2000
124 #ifdef CONFIG_CMD_USB
125 #define CONFIG_USB_EHCI_MX5
126 #define CONFIG_MXC_USB_PORT 1
127 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
128 #define CONFIG_MXC_USB_FLAGS 0
134 #ifdef CONFIG_CMD_SATA
135 #define CONFIG_SYS_SATA_MAX_DEVICE 1
136 #define CONFIG_DWC_AHSATA_PORT_ID 0
137 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_BASE_ADDR
145 #define CONFIG_VIDEO_IPUV3
146 #define CONFIG_VIDEO_BMP_RLE8
147 #define CONFIG_VIDEO_BMP_GZIP
148 #define CONFIG_SPLASH_SCREEN
149 #define CONFIG_SPLASHIMAGE_GUARD
150 #define CONFIG_SPLASH_SCREEN_ALIGN
151 #define CONFIG_BMP_16BPP
152 #define CONFIG_VIDEO_LOGO
153 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (2 << 20)
159 #define CONFIG_CMDLINE_TAG
160 #define CONFIG_INITRD_TAG
161 #define CONFIG_REVISION_TAG
162 #define CONFIG_SETUP_MEMORY_TAGS
163 #define CONFIG_BOOTFILE "fitImage"
164 #define CONFIG_LOADADDR 0x70800000
165 #define CONFIG_BOOTCOMMAND "run mmc_mmc"
166 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
171 #define CONFIG_SPL_TARGET "u-boot-with-nand-spl.imx"
172 #define CONFIG_SPL_TEXT_BASE 0x70008000
173 #define CONFIG_SPL_PAD_TO 0x8000
174 #define CONFIG_SPL_STACK 0x70004000
176 #define CONFIG_SYS_NAND_U_BOOT_OFFS CONFIG_SPL_PAD_TO
177 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
178 #define CONFIG_SYS_NAND_OOBSIZE 64
179 #define CONFIG_SYS_NAND_PAGE_COUNT 64
180 #define CONFIG_SYS_NAND_SIZE (256 * 1024 * 1024)
181 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
186 #define CONFIG_PREBOOT "run try_bootscript"
187 #define CONFIG_HOSTNAME "m53evk"
189 #define CONFIG_EXTRA_ENV_SETTINGS \
190 "consdev=ttymxc1\0" \
191 "baudrate=115200\0" \
192 "bootscript=boot.scr\0" \
193 "bootdev=/dev/mmcblk0p1\0" \
194 "rootdev=/dev/mmcblk0p2\0" \
196 "rootpath=/opt/eldk-5.5/armv7a-hf/rootfs-qte-sdk\0" \
197 "kernel_addr_r=0x72000000\0" \
199 "setenv bootargs ${bootargs} " \
200 "console=${consdev},${baudrate}\0" \
202 "setenv bootargs ${bootargs} " \
203 "ip=${ipaddr}:${serverip}:${gatewayip}:" \
204 "${netmask}:${hostname}:${netdev}:off\0" \
206 "setenv bootargs ${bootargs} ${miscargs}\0" \
208 "if test \"x${mtdparts}\" == \"x\" ; then " \
209 "mtdparts default ; " \
212 "run adddfltmtd ; " \
213 "setenv bootargs ${bootargs} ${mtdparts}\0" \
214 "addargs=run addcons addmtd addmisc\0" \
217 "load mmc 0:1 ${kernel_addr_r} ${bootfile}\0" \
219 "ubi part UBI ; ubifsmount ubi0:rootfs ; " \
220 "ubifsload ${kernel_addr_r} /boot/${bootfile}\0" \
222 "tftp ${kernel_addr_r} ${hostname}/${bootfile}\0" \
223 "miscargs=nohlt panic=1\0" \
224 "mmcargs=setenv bootargs root=${rootdev} rw rootwait\0" \
226 "setenv bootargs ubi.mtd=5 " \
227 "root=ubi0:rootfs rootfstype=ubifs\0" \
229 "setenv bootargs root=/dev/nfs rw " \
230 "nfsroot=${serverip}:${rootpath},v3,tcp\0" \
232 "run mmcload mmcargs addargs ; " \
233 "bootm ${kernel_addr_r}\0" \
235 "run mmcload ubiargs addargs ; " \
236 "bootm ${kernel_addr_r}\0" \
238 "run mmcload nfsargs addip addargs ; " \
239 "bootm ${kernel_addr_r}\0" \
241 "run ubiload mmcargs addargs ; " \
242 "bootm ${kernel_addr_r}\0" \
244 "run ubiload ubiargs addargs ; " \
245 "bootm ${kernel_addr_r}\0" \
247 "run ubiload nfsargs addip addargs ; " \
248 "bootm ${kernel_addr_r}\0" \
250 "run netload mmcargs addargs ; " \
251 "bootm ${kernel_addr_r}\0" \
253 "run netload ubiargs addargs ; " \
254 "bootm ${kernel_addr_r}\0" \
256 "run netload nfsargs addip addargs ; " \
257 "bootm ${kernel_addr_r}\0" \
260 "if test -e mmc 0:1 ${bootscript} ; then " \
261 "if load mmc 0:1 ${kernel_addr_r} ${bootscript};" \
263 "echo Running bootscript... ; " \
264 "source ${kernel_addr_r} ; " \
268 #endif /* __M53EVK_CONFIG_H__ */