2 * Aries M53 configuration
3 * Copyright (C) 2012-2013 Marek Vasut <marex@denx.de>
5 * SPDX-License-Identifier: GPL-2.0+
8 #ifndef __M53EVK_CONFIG_H__
9 #define __M53EVK_CONFIG_H__
11 #define CONFIG_MXC_GPIO
13 #include <asm/arch/imx-regs.h>
15 #define CONFIG_REVISION_TAG
16 #define CONFIG_SYS_FSL_CLK
18 #define CONFIG_TIMESTAMP /* Print image info with timestamp */
21 * Memory configurations
23 #define CONFIG_NR_DRAM_BANKS 2
24 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
25 #define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size)
26 #define PHYS_SDRAM_2 CSD1_BASE_ADDR
27 #define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size)
28 #define PHYS_SDRAM_SIZE (gd->ram_size)
29 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
30 #define CONFIG_SYS_MEMTEST_START 0x70000000
31 #define CONFIG_SYS_MEMTEST_END 0x8ff00000
33 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
34 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
35 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
37 #define CONFIG_SYS_INIT_SP_OFFSET \
38 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
39 #define CONFIG_SYS_INIT_SP_ADDR \
40 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
42 #define CONFIG_SYS_TEXT_BASE 0x71000000
45 * U-Boot general configurations
47 #define CONFIG_SYS_LONGHELP
48 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */
49 #define CONFIG_SYS_MAXARGS 32 /* Max number of command args */
50 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
51 /* Boot argument buffer size */
52 #define CONFIG_AUTO_COMPLETE /* Command auto complete */
53 #define CONFIG_CMDLINE_EDITING /* Command history etc */
58 #define CONFIG_MXC_UART
59 #define CONFIG_MXC_UART_BASE UART2_BASE
60 #define CONFIG_CONS_INDEX 1
66 #define CONFIG_FSL_ESDHC
67 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
68 #define CONFIG_SYS_FSL_ESDHC_NUM 1
74 #define CONFIG_ENV_SIZE (16 * 1024)
75 #ifdef CONFIG_CMD_NAND
76 #define CONFIG_SYS_MAX_NAND_DEVICE 1
77 #define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR_AXI
78 #define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR_AXI
79 #define CONFIG_MXC_NAND_IP_REGS_BASE NFC_BASE_ADDR
80 #define CONFIG_SYS_NAND_LARGEPAGE
81 #define CONFIG_MXC_NAND_HWECC
82 #define CONFIG_SYS_NAND_USE_FLASH_BBT
84 /* Environment is in NAND */
85 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
86 #define CONFIG_ENV_SECT_SIZE (128 * 1024)
87 #define CONFIG_ENV_RANGE (4 * CONFIG_ENV_SECT_SIZE)
88 #define CONFIG_ENV_OFFSET (8 * CONFIG_ENV_SECT_SIZE) /* 1 MiB */
89 #define CONFIG_ENV_OFFSET_REDUND \
90 (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE)
92 #define CONFIG_MTD_DEVICE
93 #define CONFIG_MTD_PARTITIONS
94 #define MTDIDS_DEFAULT "nand0=mxc_nand"
95 #define MTDPARTS_DEFAULT \
96 "mtdparts=mxc_nand:" \
106 * Ethernet on SOC (FEC)
108 #ifdef CONFIG_CMD_NET
109 #define CONFIG_FEC_MXC
110 #define IMX_FEC_BASE FEC_BASE_ADDR
111 #define CONFIG_FEC_MXC_PHYADDR 0x0
113 #define CONFIG_DISCOVER_PHY
114 #define CONFIG_FEC_XCV_TYPE RMII
115 #define CONFIG_ETHPRIME "FEC0"
121 #ifdef CONFIG_CMD_I2C
122 #define CONFIG_SYS_I2C
123 #define CONFIG_SYS_I2C_MXC
124 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
125 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
126 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
127 #define CONFIG_SYS_RTC_BUS_NUM 1 /* I2C2 */
133 #ifdef CONFIG_CMD_DATE
134 #define CONFIG_RTC_M41T62
135 #define CONFIG_SYS_I2C_RTC_ADDR 0x68
136 #define CONFIG_SYS_M41T11_BASE_YEAR 2000
142 #ifdef CONFIG_CMD_USB
143 #define CONFIG_USB_EHCI_MX5
144 #define CONFIG_MXC_USB_PORT 1
145 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
146 #define CONFIG_MXC_USB_FLAGS 0
152 #ifdef CONFIG_CMD_SATA
153 #define CONFIG_DWC_AHSATA
154 #define CONFIG_SYS_SATA_MAX_DEVICE 1
155 #define CONFIG_DWC_AHSATA_PORT_ID 0
156 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_BASE_ADDR
158 #define CONFIG_LIBATA
165 #define CONFIG_VIDEO_IPUV3
166 #define CONFIG_VIDEO_BMP_RLE8
167 #define CONFIG_VIDEO_BMP_GZIP
168 #define CONFIG_SPLASH_SCREEN
169 #define CONFIG_SPLASHIMAGE_GUARD
170 #define CONFIG_SPLASH_SCREEN_ALIGN
171 #define CONFIG_BMP_16BPP
172 #define CONFIG_VIDEO_LOGO
173 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (2 << 20)
179 #define CONFIG_CMDLINE_TAG
180 #define CONFIG_INITRD_TAG
181 #define CONFIG_REVISION_TAG
182 #define CONFIG_SETUP_MEMORY_TAGS
183 #define CONFIG_BOOTFILE "fitImage"
184 #define CONFIG_LOADADDR 0x70800000
185 #define CONFIG_BOOTCOMMAND "run mmc_mmc"
186 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
191 #define CONFIG_SPL_FRAMEWORK
192 #define CONFIG_SPL_TARGET "u-boot-with-nand-spl.imx"
193 #define CONFIG_SPL_TEXT_BASE 0x70008000
194 #define CONFIG_SPL_PAD_TO 0x8000
195 #define CONFIG_SPL_STACK 0x70004000
197 #define CONFIG_SYS_NAND_U_BOOT_OFFS CONFIG_SPL_PAD_TO
198 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
199 #define CONFIG_SYS_NAND_OOBSIZE 64
200 #define CONFIG_SYS_NAND_PAGE_COUNT 64
201 #define CONFIG_SYS_NAND_SIZE (256 * 1024 * 1024)
202 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
207 #define CONFIG_PREBOOT "run try_bootscript"
208 #define CONFIG_HOSTNAME m53evk
210 #define CONFIG_EXTRA_ENV_SETTINGS \
211 "consdev=ttymxc1\0" \
212 "baudrate=115200\0" \
213 "bootscript=boot.scr\0" \
214 "bootdev=/dev/mmcblk0p1\0" \
215 "rootdev=/dev/mmcblk0p2\0" \
217 "rootpath=/opt/eldk-5.5/armv7a-hf/rootfs-qte-sdk\0" \
218 "kernel_addr_r=0x72000000\0" \
220 "setenv bootargs ${bootargs} " \
221 "console=${consdev},${baudrate}\0" \
223 "setenv bootargs ${bootargs} " \
224 "ip=${ipaddr}:${serverip}:${gatewayip}:" \
225 "${netmask}:${hostname}:${netdev}:off\0" \
227 "setenv bootargs ${bootargs} ${miscargs}\0" \
229 "if test \"x${mtdparts}\" == \"x\" ; then " \
230 "mtdparts default ; " \
233 "run adddfltmtd ; " \
234 "setenv bootargs ${bootargs} ${mtdparts}\0" \
235 "addargs=run addcons addmtd addmisc\0" \
238 "load mmc 0:1 ${kernel_addr_r} ${bootfile}\0" \
240 "ubi part UBI ; ubifsmount ubi0:rootfs ; " \
241 "ubifsload ${kernel_addr_r} /boot/${bootfile}\0" \
243 "tftp ${kernel_addr_r} ${hostname}/${bootfile}\0" \
244 "miscargs=nohlt panic=1\0" \
245 "mmcargs=setenv bootargs root=${rootdev} rw rootwait\0" \
247 "setenv bootargs ubi.mtd=5 " \
248 "root=ubi0:rootfs rootfstype=ubifs\0" \
250 "setenv bootargs root=/dev/nfs rw " \
251 "nfsroot=${serverip}:${rootpath},v3,tcp\0" \
253 "run mmcload mmcargs addargs ; " \
254 "bootm ${kernel_addr_r}\0" \
256 "run mmcload ubiargs addargs ; " \
257 "bootm ${kernel_addr_r}\0" \
259 "run mmcload nfsargs addip addargs ; " \
260 "bootm ${kernel_addr_r}\0" \
262 "run ubiload mmcargs addargs ; " \
263 "bootm ${kernel_addr_r}\0" \
265 "run ubiload ubiargs addargs ; " \
266 "bootm ${kernel_addr_r}\0" \
268 "run ubiload nfsargs addip addargs ; " \
269 "bootm ${kernel_addr_r}\0" \
271 "run netload mmcargs addargs ; " \
272 "bootm ${kernel_addr_r}\0" \
274 "run netload ubiargs addargs ; " \
275 "bootm ${kernel_addr_r}\0" \
277 "run netload nfsargs addip addargs ; " \
278 "bootm ${kernel_addr_r}\0" \
281 "if test -e mmc 0:1 ${bootscript} ; then " \
282 "if load mmc 0:1 ${kernel_addr_r} ${bootscript};" \
284 "echo Running bootscript... ; " \
285 "source ${kernel_addr_r} ; " \
289 #endif /* __M53EVK_CONFIG_H__ */