2 * Copyright (C) 2013 Gabor Juhos <juhosg@openwrt.org>
4 * SPDX-License-Identifier: GPL-2.0
7 #ifndef _MALTA_CONFIG_H
8 #define _MALTA_CONFIG_H
11 * System configuration
15 #define CONFIG_MEMSIZE_IN_BYTES
17 #define CONFIG_PCI_GT64120
18 #define CONFIG_PCI_MSC01
20 #define CONFIG_PCNET_79C973
21 #define PCNET_HAS_PROM
23 #define CONFIG_MISC_INIT_R
24 #define CONFIG_RTC_MC146818
25 #define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0
30 #define CONFIG_SYS_MHZ 250 /* arbitrary value */
31 #define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000)
36 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
39 # define CONFIG_SYS_SDRAM_BASE 0xffffffff80000000
41 # define CONFIG_SYS_SDRAM_BASE 0x80000000
43 #define CONFIG_SYS_MEM_SIZE (256 * 1024 * 1024)
45 #define CONFIG_SYS_INIT_SP_OFFSET 0x400000
47 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x01000000)
48 #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + 0x00100000)
49 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x00800000)
51 #define CONFIG_SYS_MALLOC_LEN (128 * 1024)
52 #define CONFIG_SYS_BOOTPARAMS_LEN (128 * 1024)
53 #define CONFIG_SYS_BOOTM_LEN (64 * 1024 * 1024)
58 #define CONFIG_SYS_NS16550_PORT_MAPPED
64 # define CONFIG_SYS_FLASH_BASE 0xffffffffbe000000
66 # define CONFIG_SYS_FLASH_BASE 0xbe000000
68 #define CONFIG_SYS_MAX_FLASH_BANKS 1
69 #define CONFIG_SYS_MAX_FLASH_SECT 128
70 #define CONFIG_SYS_FLASH_CFI
71 #define CONFIG_FLASH_CFI_DRIVER
72 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
77 #define CONFIG_ENV_SECT_SIZE 0x20000
78 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
79 #define CONFIG_ENV_ADDR \
80 (CONFIG_SYS_FLASH_BASE + (4 << 20) - CONFIG_ENV_SIZE)
85 #define CONFIG_SYS_IDE_MAXBUS 1
86 #define CONFIG_SYS_IDE_MAXDEVICE 2
87 #define CONFIG_SYS_ATA_BASE_ADDR CONFIG_SYS_ISA_IO_BASE_ADDRESS
88 #define CONFIG_SYS_ATA_IDE0_OFFSET 0x01f0
89 #define CONFIG_SYS_ATA_DATA_OFFSET 0
90 #define CONFIG_SYS_ATA_REG_OFFSET 0
96 #endif /* _MALTA_CONFIG_H */