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1 /*
2  * Copyright (C) 2011 Ilya Yanok, Emcraft Systems
3  *
4  * Based on omap3_evm_config.h
5  *
6  * SPDX-License-Identifier:     GPL-2.0+
7  */
8
9 #ifndef __CONFIG_H
10 #define __CONFIG_H
11
12 /*
13  * High Level Configuration Options
14  */
15 #define CONFIG_OMAP                     /* in a TI OMAP core */
16 #define CONFIG_OMAP3_MCX                /* working with mcx */
17 #define CONFIG_OMAP_GPIO
18 #define CONFIG_OMAP_COMMON
19 /* Common ARM Erratas */
20 #define CONFIG_ARM_ERRATA_454179
21 #define CONFIG_ARM_ERRATA_430973
22 #define CONFIG_ARM_ERRATA_621766
23
24 #define MACH_TYPE_MCX                   3656
25 #define CONFIG_MACH_TYPE        MACH_TYPE_MCX
26 #define CONFIG_BOARD_LATE_INIT
27
28
29 #define CONFIG_SYS_CACHELINE_SIZE       64
30
31 #define CONFIG_EMIF4    /* The chip has EMIF4 controller */
32
33 #include <asm/arch/cpu.h>               /* get chip and board defs */
34 #include <asm/arch/omap.h>
35
36 #define CONFIG_OF_LIBFDT
37 #define CONFIG_FIT
38
39 /*
40  * Leave it at 0x80008000 to allow booting new u-boot.bin with X-loader
41  * and older u-boot.bin with the new U-Boot SPL.
42  */
43 #define CONFIG_SYS_TEXT_BASE            0x80008000
44
45 /*
46  * Display CPU and Board information
47  */
48 #define CONFIG_DISPLAY_CPUINFO
49 #define CONFIG_DISPLAY_BOARDINFO
50
51 /* Clock Defines */
52 #define V_OSCK                  26000000        /* Clock output from T2 */
53 #define V_SCLK                  (V_OSCK >> 1)
54
55 #define CONFIG_MISC_INIT_R
56
57 #define CONFIG_CMDLINE_TAG                      /* enable passing of ATAGs */
58 #define CONFIG_SETUP_MEMORY_TAGS
59 #define CONFIG_INITRD_TAG
60 #define CONFIG_REVISION_TAG
61
62 /*
63  * Size of malloc() pool
64  */
65 #define CONFIG_ENV_SIZE                 (128 << 10)     /* 128 KiB sector */
66 #define CONFIG_SYS_MALLOC_LEN           (1024 << 10)
67 /*
68  * DDR related
69  */
70 #define CONFIG_SYS_CS0_SIZE             (256 * 1024 * 1024)
71
72 /*
73  * Hardware drivers
74  */
75
76 /*
77  * NS16550 Configuration
78  */
79 #define V_NS16550_CLK                   48000000        /* 48MHz (APLL96/2) */
80
81 #define CONFIG_SYS_NS16550
82 #define CONFIG_SYS_NS16550_SERIAL
83 #define CONFIG_SYS_NS16550_REG_SIZE     (-4)
84 #define CONFIG_SYS_NS16550_CLK          V_NS16550_CLK
85
86 /*
87  * select serial console configuration
88  */
89 #define CONFIG_CONS_INDEX               3
90 #define CONFIG_SYS_NS16550_COM3         OMAP34XX_UART3
91 #define CONFIG_SERIAL3                  3       /* UART3 */
92
93 /* allow to overwrite serial and ethaddr */
94 #define CONFIG_ENV_OVERWRITE
95 #define CONFIG_BAUDRATE                 115200
96 #define CONFIG_SYS_BAUDRATE_TABLE       {4800, 9600, 19200, 38400, 57600,\
97                                         115200}
98 #define CONFIG_MMC
99 #define CONFIG_OMAP_HSMMC
100 #define CONFIG_GENERIC_MMC
101 #define CONFIG_DOS_PARTITION
102
103 /* EHCI */
104 #define CONFIG_USB_STORAGE
105 #define CONFIG_OMAP3_GPIO_2
106 #define CONFIG_OMAP3_GPIO_5
107 #define CONFIG_USB_EHCI
108 #define CONFIG_USB_EHCI_OMAP
109 #define CONFIG_USB_ULPI
110 #define CONFIG_USB_ULPI_VIEWPORT_OMAP
111 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO        57
112 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
113 #define CONFIG_USB_HOST_ETHER
114 #define CONFIG_USB_ETHER_ASIX
115 #define CONFIG_USB_ETHER_MCS7830
116
117 /* commands to include */
118 #define CONFIG_CMD_EXT2         /* EXT2 Support                 */
119 #define CONFIG_CMD_FAT          /* FAT support                  */
120 #define CONFIG_CMD_JFFS2        /* JFFS2 Support                */
121
122 #define CONFIG_CMD_DATE
123 #define CONFIG_CMD_I2C          /* I2C serial bus support       */
124 #define CONFIG_CMD_MMC          /* MMC support                  */
125 #define CONFIG_CMD_FAT          /* FAT support                  */
126 #define CONFIG_CMD_USB
127 #define CONFIG_CMD_NAND         /* NAND support                 */
128 #define CONFIG_CMD_DHCP
129 #define CONFIG_CMD_PING
130 #define CONFIG_CMD_CACHE
131 #define CONFIG_CMD_UBI
132 #define CONFIG_CMD_UBIFS
133 #define CONFIG_RBTREE
134 #define CONFIG_LZO
135 #define CONFIG_MTD_PARTITIONS
136 #define CONFIG_MTD_DEVICE
137 #define CONFIG_CMD_MTDPARTS
138 #define CONFIG_CMD_GPIO
139
140 #define CONFIG_SYS_NO_FLASH
141 #define CONFIG_SYS_I2C
142 #define CONFIG_SYS_OMAP24_I2C_SPEED     100000
143 #define CONFIG_SYS_OMAP24_I2C_SLAVE     1
144 #define CONFIG_SYS_I2C_OMAP34XX
145
146 /* RTC */
147 #define CONFIG_RTC_DS1337
148 #define CONFIG_SYS_I2C_RTC_ADDR         0x68
149
150 #define CONFIG_CMD_MII
151 /*
152  * Board NAND Info.
153  */
154 #define CONFIG_SYS_NAND_ADDR            NAND_BASE       /* physical address */
155                                                         /* to access nand */
156 #define CONFIG_SYS_NAND_BASE            NAND_BASE       /* physical address */
157                                                         /* to access */
158                                                         /* nand at CS0 */
159
160 #define CONFIG_SYS_MAX_NAND_DEVICE      1               /* Max number of */
161                                                         /* NAND devices */
162 #define CONFIG_JFFS2_NAND
163 /* nand device jffs2 lives on */
164 #define CONFIG_JFFS2_DEV                "nand0"
165 /* start of jffs2 partition */
166 #define CONFIG_JFFS2_PART_OFFSET        0x680000
167 #define CONFIG_JFFS2_PART_SIZE          0xf980000       /* sz of jffs2 part */
168
169 /* Environment information */
170 #define CONFIG_BOOTDELAY        3
171
172 #define CONFIG_BOOTFILE         "uImage"
173
174 /* Setup MTD for NAND on the SOM */
175 #define MTDIDS_DEFAULT          "nand0=omap2-nand.0"
176 #define MTDPARTS_DEFAULT        "mtdparts=omap2-nand.0:512k(MLO),"      \
177                                 "1m(u-boot),256k(env1),"                \
178                                 "256k(env2),6m(kernel),6m(k_recovery)," \
179                                 "8m(fs_recovery),-(common_data)"
180
181 #define CONFIG_HOSTNAME mcx
182 #define CONFIG_EXTRA_ENV_SETTINGS \
183         "adddbg=setenv bootargs ${bootargs} trace_buf_size=64M\0"       \
184         "adddebug=setenv bootargs ${bootargs} earlyprintk=serial\0"     \
185         "addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0"       \
186         "addfb=setenv bootargs ${bootargs} vram=6M "                    \
187                 "omapfb.vram=1:2M,2:2M,3:2M omapdss.def_disp=lcd\0"     \
188         "addip_sta=setenv bootargs ${bootargs} "                        \
189                 "ip=${ipaddr}:${serverip}:${gatewayip}:"                \
190                 "${netmask}:${hostname}:eth0:off\0"                     \
191         "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0"               \
192         "addip=if test -n ${ipdyn};then run addip_dyn;"                 \
193                 "else run addip_sta;fi\0"                               \
194         "addmisc=setenv bootargs ${bootargs} ${misc}\0"                 \
195         "addtty=setenv bootargs ${bootargs} "                           \
196                 "console=${consoledev},${baudrate}\0"                   \
197         "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0"              \
198         "baudrate=115200\0"                                             \
199         "consoledev=ttyO2\0"                                            \
200         "hostname=" __stringify(CONFIG_HOSTNAME) "\0"                   \
201         "loadaddr=0x82000000\0"                                         \
202         "load=tftp ${loadaddr} ${u-boot}\0"                             \
203         "load_k=tftp ${loadaddr} ${bootfile}\0"                         \
204         "loaduimage=fatload mmc 0 ${loadaddr} uImage\0"                 \
205         "loadmlo=tftp ${loadaddr} ${mlo}\0"                             \
206         "mlo=" __stringify(CONFIG_HOSTNAME) "/MLO\0"                    \
207         "mmcargs=root=/dev/mmcblk0p2 rw "                               \
208                 "rootfstype=ext3 rootwait\0"                            \
209         "mmcboot=echo Booting from mmc ...; "                           \
210                 "run mmcargs; "                                         \
211                 "run addip addtty addmtd addfb addeth addmisc;"         \
212                 "run loaduimage; "                                      \
213                 "bootm ${loadaddr}\0"                                   \
214         "net_nfs=run load_k; "                                          \
215                 "run nfsargs; "                                         \
216                 "run addip addtty addmtd addfb addeth addmisc;"         \
217                 "bootm ${loadaddr}\0"                                   \
218         "nfsargs=setenv bootargs root=/dev/nfs rw "                     \
219                 "nfsroot=${serverip}:${rootpath}\0"                     \
220         "u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.img\0"          \
221         "uboot_addr=0x80000\0"                                          \
222         "update=nandecc sw;nand erase ${uboot_addr} 100000;"            \
223                 "nand write ${loadaddr} ${uboot_addr} 80000\0"          \
224         "updatemlo=nandecc hw;nand erase 0 20000;"                      \
225                 "nand write ${loadaddr} 0 20000\0"                      \
226         "upd=if run load;then echo Updating u-boot;if run update;"      \
227                 "then echo U-Boot updated;"                             \
228                         "else echo Error updating u-boot !;"            \
229                         "echo Board without bootloader !!;"             \
230                 "fi;"                                                   \
231                 "else echo U-Boot not downloaded..exiting;fi\0"         \
232         "loadbootscript=fatload mmc 0 ${loadaddr} boot.scr\0"           \
233         "bootscript=echo Running bootscript from mmc ...; "             \
234                 "source ${loadaddr}\0"                                  \
235         "nandargs=setenv bootargs ubi.mtd=7 "                           \
236                 "root=ubi0:rootfs rootfstype=ubifs\0"                   \
237         "nandboot=echo Booting from nand ...; "                         \
238                 "run nandargs; "                                        \
239                 "ubi part nand0,4;"                                     \
240                 "ubi readvol ${loadaddr} kernel;"                       \
241                 "run addtty addmtd addfb addeth addmisc;"               \
242                 "bootm ${loadaddr}\0"                                   \
243         "preboot=ubi part nand0,7;"                                     \
244                 "ubi readvol ${loadaddr} splash;"                       \
245                 "bmp display ${loadaddr};"                              \
246                 "gpio set 55\0"                                         \
247         "swupdate_args=setenv bootargs root=/dev/ram "                  \
248                 "quiet loglevel=1 "                                     \
249                 "consoleblank=0 ${swupdate_misc}\0"                     \
250         "swupdate=echo Running Sw-Update...;"                           \
251                 "if printenv mtdparts;then echo Starting SwUpdate...; " \
252                 "else mtdparts default;fi; "                            \
253                 "ubi part nand0,5;"                                     \
254                 "ubi readvol 0x82000000 kernel_recovery;"               \
255                 "ubi part nand0,6;"                                     \
256                 "ubi readvol 0x84000000 fs_recovery;"                   \
257                 "run swupdate_args; "                                   \
258                 "setenv bootargs ${bootargs} "                          \
259                         "${mtdparts} "                                  \
260                         "vram=6M omapfb.vram=1:2M,2:2M,3:2M "           \
261                         "omapdss.def_disp=lcd;"                         \
262                 "bootm 0x82000000 0x84000000\0"                         \
263         "bootcmd=mmc rescan;if fatload mmc 0 82000000 loadbootscr.scr;" \
264                 "then source 82000000;else run nandboot;fi\0"
265
266 #define CONFIG_AUTO_COMPLETE
267 #define CONFIG_CMDLINE_EDITING
268
269 /*
270  * Miscellaneous configurable options
271  */
272 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
273 #define CONFIG_SYS_HUSH_PARSER          /* use "hush" command parser */
274 #define CONFIG_SYS_CBSIZE               1024/* Console I/O Buffer Size */
275 /* Print Buffer Size */
276 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
277                                         sizeof(CONFIG_SYS_PROMPT) + 16)
278 #define CONFIG_SYS_MAXARGS              16      /* max number of command */
279                                                 /* args */
280 /* Boot Argument Buffer Size */
281 #define CONFIG_SYS_BARGSIZE             (CONFIG_SYS_CBSIZE)
282 /* memtest works on */
283 #define CONFIG_SYS_MEMTEST_START        (OMAP34XX_SDRC_CS0)
284 #define CONFIG_SYS_MEMTEST_END          (OMAP34XX_SDRC_CS0 + \
285                                         0x01F00000) /* 31MB */
286
287 #define CONFIG_SYS_LOAD_ADDR            (OMAP34XX_SDRC_CS0) /* default load */
288                                                                 /* address */
289 #define CONFIG_PREBOOT
290
291 /*
292  * AM3517 has 12 GP timers, they can be driven by the system clock
293  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
294  * This rate is divided by a local divisor.
295  */
296 #define CONFIG_SYS_TIMERBASE            OMAP34XX_GPT2
297 #define CONFIG_SYS_PTV                  2       /* Divisor: 2^(PTV+1) => 8 */
298
299 /*
300  * Physical Memory Map
301  */
302 #define CONFIG_NR_DRAM_BANKS    2       /* CS1 may or may not be populated */
303 #define PHYS_SDRAM_1            OMAP34XX_SDRC_CS0
304 #define PHYS_SDRAM_2            OMAP34XX_SDRC_CS1
305
306 /*
307  * FLASH and environment organization
308  */
309
310 /* **** PISMO SUPPORT *** */
311 #define CONFIG_NAND
312 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
313 #define CONFIG_NAND_OMAP_GPMC
314 #define CONFIG_NAND_OMAP_GPMC_PREFETCH
315 #define CONFIG_ENV_IS_IN_NAND
316 #define SMNAND_ENV_OFFSET               0x180000 /* environment starts here */
317
318 /* Redundant Environment */
319 #define CONFIG_SYS_ENV_SECT_SIZE        (128 << 10)     /* 128 KiB */
320 #define CONFIG_ENV_OFFSET               SMNAND_ENV_OFFSET
321 #define CONFIG_ENV_ADDR                 SMNAND_ENV_OFFSET
322 #define CONFIG_ENV_OFFSET_REDUND        (CONFIG_ENV_OFFSET + \
323                                                 2 * CONFIG_SYS_ENV_SECT_SIZE)
324 #define CONFIG_ENV_SIZE_REDUND          CONFIG_ENV_SIZE
325
326 /* Flash banks JFFS2 should use */
327 #define CONFIG_SYS_MAX_MTD_BANKS        (CONFIG_SYS_MAX_FLASH_BANKS + \
328                                         CONFIG_SYS_MAX_NAND_DEVICE)
329 #define CONFIG_SYS_JFFS2_MEM_NAND
330 /* use flash_info[2] */
331 #define CONFIG_SYS_JFFS2_FIRST_BANK     CONFIG_SYS_MAX_FLASH_BANKS
332 #define CONFIG_SYS_JFFS2_NUM_BANKS      1
333
334 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
335 #define CONFIG_SYS_INIT_RAM_ADDR        0x4020f800
336 #define CONFIG_SYS_INIT_RAM_SIZE        0x800
337 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INIT_RAM_ADDR + \
338                                          CONFIG_SYS_INIT_RAM_SIZE - \
339                                          GENERATED_GBL_DATA_SIZE)
340
341 /* Defines for SPL */
342 #define CONFIG_SPL_FRAMEWORK
343 #define CONFIG_SPL_BOARD_INIT
344 #define CONFIG_SPL_NAND_SIMPLE
345
346 #define CONFIG_SPL_LIBCOMMON_SUPPORT
347 #define CONFIG_SPL_LIBDISK_SUPPORT
348 #define CONFIG_SPL_I2C_SUPPORT
349 #define CONFIG_SPL_MMC_SUPPORT
350 #define CONFIG_SPL_FAT_SUPPORT
351 #define CONFIG_SPL_LIBGENERIC_SUPPORT
352 #define CONFIG_SPL_SERIAL_SUPPORT
353 #define CONFIG_SPL_POWER_SUPPORT
354 #define CONFIG_SPL_NAND_SUPPORT
355 #define CONFIG_SPL_NAND_BASE
356 #define CONFIG_SPL_NAND_DRIVERS
357 #define CONFIG_SPL_NAND_ECC
358 #define CONFIG_SPL_LDSCRIPT             "$(CPUDIR)/omap-common/u-boot-spl.lds"
359
360 #define CONFIG_SPL_TEXT_BASE            0x40200000 /*CONFIG_SYS_SRAM_START*/
361 #define CONFIG_SPL_MAX_SIZE             (54 * 1024)     /* 8 KB for stack */
362 #define CONFIG_SPL_STACK                LOW_LEVEL_SRAM_STACK
363
364 /* move malloc and bss high to prevent clashing with the main image */
365 #define CONFIG_SYS_SPL_MALLOC_START     0x8f000000
366 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x80000
367 #define CONFIG_SPL_BSS_START_ADDR       0x8f080000 /* end of RAM */
368 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000
369
370 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
371 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION      1
372 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
373
374 /* NAND boot config */
375 #define CONFIG_SYS_NAND_PAGE_COUNT      64
376 #define CONFIG_SYS_NAND_PAGE_SIZE       2048
377 #define CONFIG_SYS_NAND_OOBSIZE         64
378 #define CONFIG_SYS_NAND_BLOCK_SIZE      (128*1024)
379 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
380 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   0
381 #define CONFIG_SYS_NAND_ECCPOS          {40, 41, 42, 43, 44, 45, 46, 47,\
382                                          48, 49, 50, 51, 52, 53, 54, 55,\
383                                          56, 57, 58, 59, 60, 61, 62, 63}
384 #define CONFIG_SYS_NAND_ECCSIZE         256
385 #define CONFIG_SYS_NAND_ECCBYTES        3
386 #define CONFIG_NAND_OMAP_ECCSCHEME      OMAP_ECC_HAM1_CODE_SW
387 #define CONFIG_SPL_NAND_SOFTECC
388
389 #define CONFIG_SYS_NAND_U_BOOT_START   CONFIG_SYS_TEXT_BASE
390
391 #define CONFIG_SYS_NAND_U_BOOT_OFFS     0x80000
392
393 /*
394  * ethernet support
395  *
396  */
397 #if defined(CONFIG_CMD_NET)
398 #define CONFIG_DRIVER_TI_EMAC
399 #define CONFIG_DRIVER_TI_EMAC_USE_RMII
400 #define CONFIG_MII
401 #define CONFIG_BOOTP_DNS
402 #define CONFIG_BOOTP_DNS2
403 #define CONFIG_BOOTP_SEND_HOSTNAME
404 #define CONFIG_NET_RETRY_COUNT 10
405 #endif
406
407 #define CONFIG_VIDEO
408 #define CONFIG_CFB_CONSOLE
409 #define CONFIG_VGA_AS_SINGLE_DEVICE
410 #define CONFIG_SPLASH_SCREEN
411 #define CONFIG_VIDEO_BMP_RLE8
412 #define CONFIG_CMD_BMP
413 #define CONFIG_VIDEO_OMAP3
414 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
415
416 #endif /* __CONFIG_H */