2 * (C) Copyright 2007-2010 Michal Simek
4 * Michal SIMEK <monstr@monstr.eu>
6 * SPDX-License-Identifier: GPL-2.0+
12 #include "../board/xilinx/microblaze-generic/xparameters.h"
15 #define MICROBLAZE_V5 1
17 /* linear and spi flash memory */
18 #ifdef XILINX_FLASH_START
21 #undef RAMENV /* hold environment in flash */
23 #ifdef XILINX_SPI_FLASH_BASEADDR
26 #undef RAMENV /* hold environment in flash */
30 #define RAMENV /* hold environment in RAM */
35 #ifdef XILINX_UARTLITE_BASEADDR
36 # define CONFIG_XILINX_UARTLITE
37 # define CONFIG_SERIAL_BASE XILINX_UARTLITE_BASEADDR
38 # define CONFIG_BAUDRATE XILINX_UARTLITE_BAUDRATE
39 # define CONFIG_SYS_BAUDRATE_TABLE { CONFIG_BAUDRATE }
40 # define CONSOLE_ARG "console=console=ttyUL0,115200\0"
41 #elif XILINX_UART16550_BASEADDR
42 # define CONFIG_SYS_NS16550 1
43 # define CONFIG_SYS_NS16550_SERIAL
44 # if defined(__MICROBLAZEEL__)
45 # define CONFIG_SYS_NS16550_REG_SIZE -4
47 # define CONFIG_SYS_NS16550_REG_SIZE 4
49 # define CONFIG_CONS_INDEX 1
50 # define CONFIG_SYS_NS16550_COM1 \
51 ((XILINX_UART16550_BASEADDR & ~0xF) + 0x1000)
52 # define CONFIG_SYS_NS16550_CLK XILINX_UART16550_CLOCK_HZ
53 # define CONFIG_BAUDRATE 115200
55 /* The following table includes the supported baudrates */
56 # define CONFIG_SYS_BAUDRATE_TABLE \
57 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
58 # define CONSOLE_ARG "console=console=ttyS0,115200\0"
60 # error Undefined uart
63 /* setting reset address */
64 /*#define CONFIG_SYS_RESET_ADDRESS CONFIG_SYS_TEXT_BASE*/
67 #undef CONFIG_SYS_ENET
68 #if defined(XILINX_EMACLITE_BASEADDR) || defined(CONFIG_OF_CONTROL)
69 # define CONFIG_XILINX_EMACLITE 1
70 # define CONFIG_SYS_ENET
72 #if defined(XILINX_LLTEMAC_BASEADDR)
73 # define CONFIG_XILINX_LL_TEMAC 1
74 # define CONFIG_SYS_ENET
76 #if defined(XILINX_AXIEMAC_BASEADDR)
77 # define CONFIG_XILINX_AXIEMAC 1
78 # define CONFIG_SYS_ENET
84 #ifdef XILINX_GPIO_BASEADDR
85 # define CONFIG_XILINX_GPIO
86 # define CONFIG_SYS_GPIO_0_ADDR XILINX_GPIO_BASEADDR
89 /* interrupt controller */
90 #ifdef XILINX_INTC_BASEADDR
91 # define CONFIG_SYS_INTC_0_ADDR XILINX_INTC_BASEADDR
92 # define CONFIG_SYS_INTC_0_NUM XILINX_INTC_NUM_INTR_INPUTS
96 #if defined(XILINX_TIMER_BASEADDR) && defined(XILINX_TIMER_IRQ)
97 # define CONFIG_SYS_TIMER_0_ADDR XILINX_TIMER_BASEADDR
98 # define CONFIG_SYS_TIMER_0_IRQ XILINX_TIMER_IRQ
102 #if defined(XILINX_WATCHDOG_BASEADDR) && defined(XILINX_WATCHDOG_IRQ)
103 # define CONFIG_WATCHDOG_BASEADDR XILINX_WATCHDOG_BASEADDR
104 # define CONFIG_WATCHDOG_IRQ XILINX_WATCHDOG_IRQ
105 # define CONFIG_HW_WATCHDOG
106 # define CONFIG_XILINX_TB_WATCHDOG
109 #ifndef CONFIG_OF_CONTROL
110 /* ddr sdram - main memory */
111 # define CONFIG_SYS_SDRAM_BASE XILINX_RAM_START
112 # define CONFIG_SYS_SDRAM_SIZE XILINX_RAM_SIZE
115 #define CONFIG_SYS_MALLOC_LEN 0xC0000
116 #ifndef CONFIG_SPL_BUILD
117 # define CONFIG_SYS_MALLOC_F_LEN 1024
119 # define CONFIG_SYS_MALLOC_SIMPLE
120 # define CONFIG_SYS_MALLOC_F_LEN 0x150
123 /* Stack location before relocation */
124 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_TEXT_BASE
127 * CFI flash memory layout - Example
128 * CONFIG_SYS_FLASH_BASE = 0x2200_0000;
129 * CONFIG_SYS_FLASH_SIZE = 0x0080_0000; 8MB
131 * SECT_SIZE = 0x20000; 128kB is one sector
132 * CONFIG_ENV_SIZE = SECT_SIZE; 128kB environment store
134 * 0x2200_0000 CONFIG_SYS_FLASH_BASE
136 * 0x2204_0000 CONFIG_ENV_ADDR
140 * 0x2280_0000 CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE
145 # define CONFIG_SYS_FLASH_BASE XILINX_FLASH_START
146 # define CONFIG_SYS_FLASH_SIZE XILINX_FLASH_SIZE
147 # define CONFIG_SYS_FLASH_CFI 1
148 # define CONFIG_FLASH_CFI_DRIVER 1
150 # define CONFIG_SYS_FLASH_EMPTY_INFO 1
151 /* max number of memory banks */
152 # define CONFIG_SYS_MAX_FLASH_BANKS 1
153 /* max number of sectors on one chip */
154 # define CONFIG_SYS_MAX_FLASH_SECT 512
155 /* hardware flash protection */
156 # define CONFIG_SYS_FLASH_PROTECTION
157 /* use buffered writes (20x faster) */
158 # define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
160 # define CONFIG_ENV_IS_NOWHERE 1
161 # define CONFIG_ENV_SIZE 0x1000
162 # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE)
164 # else /* FLASH && !RAMENV */
165 # define CONFIG_ENV_IS_IN_FLASH 1
166 /* 128K(one sector) for env */
167 # define CONFIG_ENV_SECT_SIZE 0x20000
168 # define CONFIG_ENV_ADDR \
169 (CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE))
170 # define CONFIG_ENV_SIZE 0x20000
171 # endif /* FLASH && !RAMBOOT */
175 # define CONFIG_SYS_NO_FLASH 1
176 # define CONFIG_SYS_SPI_BASE XILINX_SPI_FLASH_BASEADDR
177 # define CONFIG_XILINX_SPI 1
178 # define CONFIG_SPI 1
179 # define CONFIG_SPI_FLASH_STMICRO 1
180 # define CONFIG_SF_DEFAULT_MODE SPI_MODE_3
181 # define CONFIG_SF_DEFAULT_SPEED XILINX_SPI_FLASH_MAX_FREQ
182 # define CONFIG_SF_DEFAULT_CS XILINX_SPI_FLASH_CS
185 # define CONFIG_ENV_IS_NOWHERE 1
186 # define CONFIG_ENV_SIZE 0x1000
187 # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE)
189 # else /* SPIFLASH && !RAMENV */
190 # define CONFIG_ENV_IS_IN_SPI_FLASH 1
191 # define CONFIG_ENV_SPI_MODE SPI_MODE_3
192 # define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
193 # define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
194 /* 128K(two sectors) for env */
195 # define CONFIG_ENV_SECT_SIZE 0x10000
196 # define CONFIG_ENV_SIZE (2 * CONFIG_ENV_SECT_SIZE)
197 /* Warning: adjust the offset in respect of other flash content and size */
198 # define CONFIG_ENV_OFFSET (128 * CONFIG_ENV_SECT_SIZE) /* at 8MB */
199 # endif /* SPIFLASH && !RAMBOOT */
200 #else /* !SPIFLASH */
203 # define CONFIG_SYS_NO_FLASH 1
204 # define CONFIG_ENV_IS_NOWHERE 1
205 # define CONFIG_ENV_SIZE 0x1000
206 # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE)
207 #endif /* !SPIFLASH */
211 #ifdef XILINX_SYSACE_BASEADDR
212 # define CONFIG_SYSTEMACE
213 /* #define DEBUG_SYSTEMACE */
214 # define SYSTEMACE_CONFIG_FPGA
215 # define CONFIG_SYS_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR
216 # define CONFIG_SYS_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH
217 # define CONFIG_DOS_PARTITION
220 #if defined(XILINX_USE_ICACHE)
221 # define CONFIG_ICACHE
223 # undef CONFIG_ICACHE
226 #if defined(XILINX_USE_DCACHE)
227 # define CONFIG_DCACHE
229 # undef CONFIG_DCACHE
232 #ifndef XILINX_DCACHE_BYTE_SIZE
233 #define XILINX_DCACHE_BYTE_SIZE 32768
239 #define CONFIG_BOOTP_BOOTFILESIZE
240 #define CONFIG_BOOTP_BOOTPATH
241 #define CONFIG_BOOTP_GATEWAY
242 #define CONFIG_BOOTP_HOSTNAME
245 * Command line configuration.
247 #include <config_cmd_default.h>
249 #define CONFIG_CMD_ASKENV
250 #define CONFIG_CMD_IRQ
251 #define CONFIG_CMD_MFSL
252 #define CONFIG_CMD_ECHO
253 #define CONFIG_CMD_GPIO
255 #if defined(CONFIG_DCACHE) || defined(CONFIG_ICACHE)
256 # define CONFIG_CMD_CACHE
258 # undef CONFIG_CMD_CACHE
261 #ifndef CONFIG_SYS_ENET
262 # undef CONFIG_CMD_NFS
264 # define CONFIG_CMD_PING
265 # define CONFIG_CMD_DHCP
266 # define CONFIG_CMD_TFTPPUT
269 #if defined(CONFIG_SYSTEMACE)
270 # define CONFIG_CMD_EXT2
271 # define CONFIG_CMD_FAT
275 # define CONFIG_CMD_ECHO
276 # define CONFIG_CMD_FLASH
277 # define CONFIG_CMD_IMLS
278 # define CONFIG_CMD_JFFS2
279 # define CONFIG_CMD_UBI
280 # undef CONFIG_CMD_UBIFS
282 # if !defined(RAMENV)
283 # define CONFIG_CMD_SAVEENV
284 # define CONFIG_CMD_SAVES
288 #if defined(SPIFLASH)
289 # define CONFIG_CMD_SF
291 # if !defined(RAMENV)
292 # define CONFIG_CMD_SAVEENV
293 # define CONFIG_CMD_SAVES
296 # undef CONFIG_CMD_IMLS
297 # undef CONFIG_CMD_FLASH
298 # undef CONFIG_CMD_JFFS2
299 # undef CONFIG_CMD_UBI
300 # undef CONFIG_CMD_UBIFS
304 #if defined(CONFIG_CMD_JFFS2)
305 # define CONFIG_MTD_PARTITIONS
308 #if defined(CONFIG_CMD_UBIFS)
309 # define CONFIG_CMD_UBI
313 #if defined(CONFIG_CMD_UBI)
314 # define CONFIG_MTD_PARTITIONS
315 # define CONFIG_RBTREE
318 #if defined(CONFIG_MTD_PARTITIONS)
320 #define CONFIG_CMD_MTDPARTS /* mtdparts command line support */
321 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
322 #define CONFIG_FLASH_CFI_MTD
323 #define MTDIDS_DEFAULT "nor0=flash-0"
325 /* default mtd partition table */
326 #define MTDPARTS_DEFAULT "mtdparts=flash-0:256k(u-boot),"\
327 "256k(env),3m(kernel),1m(romfs),"\
328 "1m(cramfs),-(jffs2)"
331 /* Miscellaneous configurable options */
332 #define CONFIG_SYS_PROMPT "U-Boot-mONStR> "
333 /* size of console buffer */
334 #define CONFIG_SYS_CBSIZE 512
335 /* print buffer size */
336 #define CONFIG_SYS_PBSIZE \
337 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
338 /* max number of command args */
339 #define CONFIG_SYS_MAXARGS 15
340 #define CONFIG_SYS_LONGHELP
341 /* default load address */
342 #define CONFIG_SYS_LOAD_ADDR XILINX_RAM_START
344 #define CONFIG_BOOTDELAY -1 /* -1 disables auto-boot */
345 #define CONFIG_BOOTARGS "root=romfs"
346 #define CONFIG_HOSTNAME XILINX_BOARD_NAME
347 #define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm"
348 #define CONFIG_IPADDR 192.168.0.3
349 #define CONFIG_SERVERIP 192.168.0.5
350 #define CONFIG_GATEWAYIP 192.168.0.1
352 /* architecture dependent code */
353 #define CONFIG_SYS_USR_EXCEP /* user exception */
355 #define CONFIG_PREBOOT "echo U-BOOT for ${hostname};setenv preboot;echo"
357 #define CONFIG_EXTRA_ENV_SETTINGS "unlock=yes\0" \
359 "mtdparts=mtdparts=flash-0:"\
360 "256k(u-boot),256k(env),3m(kernel),"\
361 "1m(romfs),1m(cramfs),-(jffs2)\0"\
362 "nc=setenv stdout nc;"\
363 "setenv stdin nc\0" \
364 "serial=setenv stdout serial;"\
365 "setenv stdin serial\0"
367 #define CONFIG_CMDLINE_EDITING
369 #define CONFIG_NETCONSOLE
370 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
372 /* Use the HUSH parser */
373 #define CONFIG_SYS_HUSH_PARSER
375 /* Enable flat device tree support */
378 #define CONFIG_OF_LIBFDT 1
380 #if defined(CONFIG_XILINX_LL_TEMAC) || defined(CONFIG_XILINX_AXIEMAC)
381 # define CONFIG_MII 1
382 # define CONFIG_CMD_MII 1
383 # define CONFIG_PHY_GIGE 1
384 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 1
385 # define CONFIG_PHYLIB 1
386 # define CONFIG_PHY_ATHEROS 1
387 # define CONFIG_PHY_BROADCOM 1
388 # define CONFIG_PHY_DAVICOM 1
389 # define CONFIG_PHY_LXT 1
390 # define CONFIG_PHY_MARVELL 1
391 # define CONFIG_PHY_MICREL 1
392 # define CONFIG_PHY_NATSEMI 1
393 # define CONFIG_PHY_REALTEK 1
394 # define CONFIG_PHY_VITESSE 1
397 # undef CONFIG_CMD_MII
398 # undef CONFIG_PHYLIB
402 #define CONFIG_CMD_SPL
403 #define CONFIG_SPL_FRAMEWORK
404 #define CONFIG_SPL_LIBCOMMON_SUPPORT
405 #define CONFIG_SPL_LIBGENERIC_SUPPORT
406 #define CONFIG_SPL_SERIAL_SUPPORT
407 #define CONFIG_SPL_BOARD_INIT
409 #define CONFIG_SPL_LDSCRIPT "arch/microblaze/cpu/u-boot-spl.lds"
411 #define CONFIG_SPL_RAM_DEVICE
412 #ifdef CONFIG_SYS_FLASH_BASE
413 # define CONFIG_SPL_NOR_SUPPORT
414 # define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_FLASH_BASE
417 /* for booting directly linux */
418 #define CONFIG_SPL_OS_BOOT
420 #define CONFIG_SYS_OS_BASE (CONFIG_SYS_FLASH_BASE + \
422 #define CONFIG_SYS_FDT_BASE (CONFIG_SYS_FLASH_BASE + \
424 #define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_TEXT_BASE + \
427 /* SP location before relocation, must use scratch RAM */
429 #define CONFIG_SYS_INIT_RAM_ADDR 0x0
430 /* BRAM size - will be generated */
431 #define CONFIG_SYS_INIT_RAM_SIZE 0x100000
433 # define CONFIG_SPL_STACK_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
434 CONFIG_SYS_INIT_RAM_SIZE - \
435 CONFIG_SYS_MALLOC_F_LEN)
437 /* Just for sure that there is a space for stack */
438 #define CONFIG_SPL_STACK_SIZE 0x100
440 #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
442 #define CONFIG_SPL_MAX_FOOTPRINT (CONFIG_SYS_INIT_RAM_SIZE - \
443 CONFIG_SYS_INIT_RAM_ADDR - \
444 CONFIG_SYS_MALLOC_F_LEN - \
445 CONFIG_SPL_STACK_SIZE)
447 #endif /* __CONFIG_H */