2 * 2004-2005 Gary Jennejohn <garyj@denx.de>
4 * Modified for the MP2USB by (C) Copyright 2005 Eric Benard
7 * Configuration settings for the MP2USB board.
9 * See file CREDITS for list of people who contributed to this
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
31 /* ARM asynchronous clock */
32 #define AT91C_MAIN_CLOCK 179712000 /* from 18.432 MHz crystal (18432000 / 4 * 45) */
33 #define AT91C_MASTER_CLOCK (AT91C_MAIN_CLOCK/3) /* peripheral clock */
35 #define AT91_SLOW_CLOCK 32768 /* slow clock */
37 #define CONFIG_ARM920T 1 /* This is an ARM920T Core */
38 #define CONFIG_AT91RM9200 1 /* It's an Atmel AT91RM9200 SoC */
39 #define CONFIG_AT91RM9200DK 1 /* on an AT91RM9200DK Board */
40 #define CONFIG_MP2USB 1 /* on an MP2USB Board */
41 #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
42 #define USE_920T_MMU 1
44 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
45 #define CONFIG_SETUP_MEMORY_TAGS 1
46 #define CONFIG_INITRD_TAG 1
48 #define CFG_ATMEL_PLL_INIT_BUG 1
49 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
50 #define CFG_USE_MAIN_OSCILLATOR 1
52 #define MC_PUIA_VAL 0x00000000
53 #define MC_PUP_VAL 0x00000000
54 #define MC_PUER_VAL 0x00000000
55 #define MC_ASR_VAL 0x00000000
56 #define MC_AASR_VAL 0x00000000
57 #define EBI_CFGR_VAL 0x00000000
58 #define SMC2_CSR_VAL 0x00003084 /* 16bit, 2 TDF, 4 WS */
61 #define PLLAR_VAL 0x20263E04 /* 180 MHz for PCK */
62 #define PLLBR_VAL 0x1048bE0E /* 48 MHz (divider by 2 for USB) */
63 #define MCKR_VAL 0x00000202 /* PCK/3 = MCK Master Clock = 60MHz from PLLA */
66 #define PIOC_ASR_VAL 0xFFFF0000 /* Configure PIOC as peripheral (D16/D31) */
67 #define PIOC_BSR_VAL 0x00000000
68 #define PIOC_PDR_VAL 0xFFFF0000
69 #define EBI_CSA_VAL 0x00000002 /* CS1=SDRAM */
70 #define SDRC_CR_VAL 0x3211295A /* set up the SDRAM */
71 #define SDRAM 0x20000000 /* address of the SDRAM */
72 #define SDRAM1 0x20000020 /* address of the SDRAM */
73 #define SDRAM_VAL 0x00000000 /* value written to SDRAM */
74 #define SDRC_MR_VAL 0x00000002 /* Precharge All */
75 #define SDRC_MR_VAL1 0x00000004 /* refresh */
76 #define SDRC_MR_VAL2 0x00000003 /* Load Mode Register */
77 #define SDRC_MR_VAL3 0x00000000 /* Normal Mode */
78 #define SDRC_TR_VAL 0x000002E0 /* Write refresh rate */
79 #endif /* CONFIG_SKIP_LOWLEVEL_INIT */
82 * Size of malloc() pool
84 #define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
85 #define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
87 #define CONFIG_BAUDRATE 115200
89 #define CFG_AT91C_BRGR_DIVISOR 33 /* hardcode so no __divsi3 : AT91C_MASTER_CLOCK /(baudrate * 16) */
95 /* define one of these to choose the DBGU, USART0 or USART1 as console */
100 #undef CONFIG_HWFLOW /* don't include RTS/CTS flow control support */
102 #undef CONFIG_MODEM_SUPPORT /* disable modem initialization stuff */
104 #define CONFIG_USB_OHCI 1
105 #define CONFIG_USB_KEYBOARD 1
106 #define CONFIG_USB_STORAGE 1
107 #define CONFIG_DOS_PARTITION 1
108 #define CONFIG_AT91C_PQFP_UHPBUG 1
110 #undef CFG_USB_OHCI_BOARD_INIT
111 #define CFG_USB_OHCI_CPU_INIT 1
112 #define CFG_USB_OHCI_REGS_BASE AT91_USB_HOST_BASE
113 #define CFG_USB_OHCI_SLOT_NAME "at91rm9200"
114 #define CFG_USB_OHCI_MAX_ROOT_PORTS 15
116 #undef CONFIG_HARD_I2C
118 #ifdef CONFIG_HARD_I2C
119 #define CFG_I2C_SPEED 0 /* not used */
120 #define CFG_I2C_SLAVE 0 /* not used */
121 #define CONFIG_RTC_RS5C372A /* RICOH I2C RTC */
122 #define CFG_I2C_RTC_ADDR 0x32
123 #define CFG_I2C_EEPROM_ADDR 0x50
124 #define CFG_I2C_EEPROM_ADDR_LEN 1
125 #define CFG_I2C_EEPROM_ADDR_OVERFLOW
127 /* still about 20 kB free with this defined */
130 #define CONFIG_BOOTDELAY 3
132 #ifdef CONFIG_HARD_I2C
133 #define CONFIG_COMMANDS \
143 #define CONFIG_COMMANDS \
152 CFG_CMD_AUTOSCRIPT | \
156 #define CONFIG_TIMESTAMP
160 /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
161 #include <cmd_confdefs.h>
163 #define CONFIG_NR_DRAM_BANKS 1
164 #define PHYS_SDRAM 0x20000000
165 #define PHYS_SDRAM_SIZE 0x08000000 /* 128 megs */
167 #define CFG_MEMTEST_START PHYS_SDRAM
168 #define CFG_MEMTEST_END CFG_MEMTEST_START + PHYS_SDRAM_SIZE - 262144
170 #define CONFIG_DRIVER_ETHER
171 #define CONFIG_NET_RETRY_COUNT 20
172 #undef CONFIG_AT91C_USE_RMII
174 #define PHYS_FLASH_1 0x10000000
175 #define PHYS_FLASH_SIZE 0x1000000 /* 16 megs main flash */
176 #define CFG_FLASH_BASE PHYS_FLASH_1
177 #define CFG_MONITOR_BASE CFG_FLASH_BASE
178 #define CFG_MAX_FLASH_BANKS 1
179 #define CFG_MAX_FLASH_SECT 256
180 #define CFG_FLASH_ERASE_TOUT (2 * CFG_HZ) /* Timeout for Flash Erase */
181 #define CFG_FLASH_WRITE_TOUT (2 * CFG_HZ) /* Timeout for Flash Write */
182 #define CFG_FLASH_LOCK_TOUT (10*CFG_HZ) /* Timeout for Flash Set Lock Bit */
183 #define CFG_FLASH_UNLOCK_TOUT (10*CFG_HZ) /* Timeout for Flash Clear Lock Bits */
184 #define CFG_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
186 #define CFG_ENV_IS_IN_FLASH 1
187 #define CFG_ENV_OFFSET 0x20000 /* after u-boot.bin */
188 #define CFG_ENV_ADDR (CFG_FLASH_BASE+CFG_ENV_OFFSET)
189 #define CFG_ENV_SIZE 0x20000
191 #define CFG_LOAD_ADDR 0x21000000 /* default load address */
193 #define CFG_BAUDRATE_TABLE { 115200, 57600, 38400, 19200, 9600 }
195 #define CFG_PROMPT "=> " /* Monitor Command Prompt */
196 #define CFG_CBSIZE 256 /* Console I/O Buffer Size */
197 #define CFG_MAXARGS 32 /* max number of command args */
198 #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
200 #define CFG_DEVICE_DEREGISTER /* needs device_deregister */
201 #define LITTLEENDIAN 1 /* used by usb_ohci.c */
204 /*-----------------------------------------------------------------------
205 * Board specific extension for bd_info
207 * This structure is embedded in the global bd_info (bd_t) structure
208 * and can be used by the board specific code (eg board/...)
212 /* helper variable for board environment handling
214 * env_crc_valid == 0 => uninitialised
215 * env_crc_valid > 0 => environment crc in flash is valid
216 * env_crc_valid < 0 => environment crc in flash is invalid
220 #endif /* __ASSEMBLY__ */
223 #define CFG_HZ_CLOCK (AT91C_MASTER_CLOCK/2) /* AT91C_TC0_CMR is implicitly set to */
224 /* AT91C_TC_TIMER_DIV1_CLOCK */
226 #define CONFIG_STACKSIZE (32*1024) /* regular stack */
228 #ifdef CONFIG_USE_IRQ
229 #error CONFIG_USE_IRQ not supported
232 #define CFG_DEVICE_NULLDEV 1 /* enble null device */
233 #undef CONFIG_SILENT_CONSOLE /* enable silent startup */
235 #define CONFIG_AUTOBOOT_KEYED
236 #define CONFIG_AUTOBOOT_PROMPT "Press SPACE to abort autoboot in %d seconds\n"
237 #define CONFIG_AUTOBOOT_STOP_STR " "
238 #define CONFIG_AUTOBOOT_DELAY_STR "d"
240 #define CONFIG_VERSION_VARIABLE 1 /* include version env variable */
242 #endif /* __CONFIG_H */