2 * include/configs/mx1ads.h
5 * Techware Information Technology, Inc.
6 * http://www.techware.com.tw/
8 * Ming-Len Wu <minglen_wu@techware.com.tw>
10 * This is the Configuration setting for Motorola MX1ADS board
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
32 * High Level Configuration Options
35 #define CONFIG_ARM920T 1 /* This is an ARM920T Core */
36 #define CONFIG_IMX 1 /* It's a Motorola MC9328 SoC */
37 #define CONFIG_MX1ADS 1 /* on a Motorola MX1ADS Board */
38 #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
41 * Select serial console configuration
43 #define CONFIG_IMX_SERIAL1 /* internal uart 1 */
44 /* #define _CONFIG_UART2 */ /* internal uart 2 */
45 /* #define CONFIG_SILENT_CONSOLE */ /* use this to disable output */
47 #define BOARD_LATE_INIT 1
48 #define USE_920T_MMU 1
51 #define CFG_MX1_GPCR 0x000003AB /* for MX1ADS 0L44N */
52 #define CFG_MX1_GPCR 0x000003AB /* for MX1ADS 0L44N */
53 #define CFG_MX1_GPCR 0x000003AB /* for MX1ADS 0L44N */
57 * Size of malloc() pool
60 #define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
63 #define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
66 * CS8900 Ethernet drivers
68 #define CONFIG_DRIVER_CS8900 1 /* we have a CS8900 on-board */
69 #define CS8900_BASE 0x15000300
70 #define CS8900_BUS16 1 /* the Linux driver does accesses as shorts */
73 * select serial console configuration
76 /* #define CONFIG_UART1 */
77 /* #define CONFIG_UART2 1 */
79 #define CONFIG_BAUDRATE 115200
85 #define CONFIG_BOOTP_BOOTFILESIZE
86 #define CONFIG_BOOTP_BOOTPATH
87 #define CONFIG_BOOTP_GATEWAY
88 #define CONFIG_BOOTP_HOSTNAME
92 * Command line configuration.
94 #include <config_cmd_default.h>
96 #define CONFIG_CMD_CACHE
97 #define CONFIG_CMD_REGINFO
98 #define CONFIG_CMD_ELF
101 #define CONFIG_BOOTDELAY 3
102 #define CONFIG_BOOTARGS "root=/dev/msdk mem=48M"
103 #define CONFIG_BOOTFILE "mx1ads"
104 #define CONFIG_BOOTCOMMAND "tftp; bootm"
106 #if defined(CONFIG_CMD_KGDB)
107 #define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
108 /* what's this ? it's not used anywhere */
109 #define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
113 * Miscellaneous configurable options
116 #define CFG_HUSH_PARSER 1
117 #define CFG_PROMPT_HUSH_PS2 "> "
119 #define CFG_LONGHELP /* undef to save memory */
121 #ifdef CFG_HUSH_PARSER
122 #define CFG_PROMPT "MX1ADS$ " /* Monitor Command Prompt */
124 #define CFG_PROMPT "MX1ADS=> " /* Monitor Command Prompt */
127 #define CFG_CBSIZE 256 /* Console I/O Buffer Size */
128 #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16)
129 /* Print Buffer Size */
130 #define CFG_MAXARGS 16 /* max number of command args */
131 #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
133 #define CFG_MEMTEST_START 0x09000000 /* memtest works on */
134 #define CFG_MEMTEST_END 0x0AF00000 /* 63 MB in DRAM */
136 #undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
137 #define CFG_LOAD_ADDR 0x08800000 /* default load address */
138 /*#define CFG_HZ 1000 */
139 #define CFG_HZ 3686400
140 #define CFG_CPUSPEED 0x141
142 /* valid baudrates */
143 #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
145 /*-----------------------------------------------------------------------
148 * The stack sizes are set up in start.S using the settings below
150 #define CONFIG_STACKSIZE (128*1024) /* regular stack */
151 #ifdef CONFIG_USE_IRQ
152 #define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
153 #define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
156 /*-----------------------------------------------------------------------
157 * Physical Memory Map
160 #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of SDRAM */
161 #define PHYS_SDRAM_1 0x08000000 /* SDRAM on CSD0 */
162 #define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
164 #define CFG_MAX_FLASH_BANKS 1 /* 1 bank of SyncFlash */
165 #define CFG_FLASH_BASE 0x0C000000 /* SyncFlash on CSD1 */
166 #define FLASH_BANK_SIZE 0x01000000 /* 16 MB Total */
168 /*-----------------------------------------------------------------------
169 * FLASH and environment organization
172 #define CONFIG_SYNCFLASH 1
173 #define PHYS_FLASH_SIZE 0x01000000
174 #define CFG_MAX_FLASH_SECT (16)
175 #define CFG_ENV_ADDR (CFG_FLASH_BASE+0x00ff8000)
177 #define CFG_ENV_IS_IN_FLASH 1
178 #define CFG_ENV_SIZE 0x04000 /* Total Size of Environment Sector */
179 #define CFG_ENV_SECT_SIZE 0x100000
181 /*-----------------------------------------------------------------------
182 * Enable passing ATAGS
185 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
186 #define CONFIG_SETUP_MEMORY_TAGS 1
188 #define CONFIG_SYS_CLK_FREQ 16780000
189 #define CONFIG_SYSPLL_CLK_FREQ 16000000
191 #endif /* __CONFIG_H */