2 * (C) Copyright 2011 Freescale Semiconductor, Inc.
3 * Author: Fabio Estevam <fabio.estevam@freescale.com>
6 * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
7 * on behalf of DENX Software Engineering GmbH
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 #ifndef __MX28EVK_CONFIG_H__
20 #define __MX28EVK_CONFIG_H__
25 #define CONFIG_MX28 /* i.MX28 SoC */
27 #define CONFIG_MXS_GPIO /* GPIO control */
28 #define CONFIG_SYS_HZ 1000 /* Ticks per second */
30 #define CONFIG_MACH_TYPE MACH_TYPE_MX28EVK
32 #include <asm/arch/regs-base.h>
34 #define CONFIG_SYS_NO_FLASH
35 #define CONFIG_BOARD_EARLY_INIT_F
36 #define CONFIG_ARCH_MISC_INIT
42 #define CONFIG_SPL_NO_CPU_SUPPORT_CODE
43 #define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mxs"
44 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds"
45 #define CONFIG_SPL_LIBCOMMON_SUPPORT
46 #define CONFIG_SPL_LIBGENERIC_SUPPORT
47 #define CONFIG_SPL_GPIO_SUPPORT
52 #include <config_cmd_default.h>
53 #define CONFIG_DISPLAY_CPUINFO
54 #define CONFIG_DOS_PARTITION
56 #define CONFIG_CMD_CACHE
57 #define CONFIG_CMD_DATE
58 #define CONFIG_CMD_DHCP
59 #define CONFIG_CMD_FAT
60 #define CONFIG_CMD_GPIO
61 #define CONFIG_CMD_MII
62 #define CONFIG_CMD_MMC
63 #define CONFIG_CMD_NET
64 #define CONFIG_CMD_NFS
65 #define CONFIG_CMD_PING
67 #define CONFIG_CMD_SPI
68 #define CONFIG_CMD_USB
69 #define CONFIG_CMD_BOOTZ
70 #define CONFIG_CMD_I2C
73 * Memory configurations
75 #define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */
76 #define PHYS_SDRAM_1 0x40000000 /* Base address */
77 #define PHYS_SDRAM_1_SIZE 0x40000000 /* Max 1 GB RAM */
78 #define CONFIG_SYS_MALLOC_LEN 0x00400000 /* 4 MB for malloc */
79 #define CONFIG_SYS_MEMTEST_START 0x40000000 /* Memtest start adr */
80 #define CONFIG_SYS_MEMTEST_END 0x40400000 /* 4 MB RAM test */
81 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
82 /* Point initial SP in SRAM so SPL can use it too. */
84 #define CONFIG_SYS_INIT_RAM_ADDR 0x00000000
85 #define CONFIG_SYS_INIT_RAM_SIZE (128 * 1024)
87 #define CONFIG_SYS_INIT_SP_OFFSET \
88 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
89 #define CONFIG_SYS_INIT_SP_ADDR \
90 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
93 * We need to sacrifice first 4 bytes of RAM here to avoid triggering some
94 * strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot
95 * binary. In case there was more of this mess, 0x100 bytes are skipped.
97 #define CONFIG_SYS_TEXT_BASE 0x40000100
99 #define CONFIG_ENV_OVERWRITE
101 * U-Boot general configurations
103 #define CONFIG_SYS_LONGHELP
104 #define CONFIG_SYS_PROMPT "MX28EVK U-Boot > "
105 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */
106 #define CONFIG_SYS_PBSIZE \
107 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
108 /* Print buffer size */
109 #define CONFIG_SYS_MAXARGS 32 /* Max number of command args */
110 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
111 /* Boot argument buffer size */
112 #define CONFIG_VERSION_VARIABLE /* U-BOOT version */
113 #define CONFIG_AUTO_COMPLETE /* Command auto complete */
114 #define CONFIG_CMDLINE_EDITING /* Command history etc */
115 #define CONFIG_SYS_HUSH_PARSER
120 #define CONFIG_PL011_SERIAL
121 #define CONFIG_PL011_CLOCK 24000000
122 #define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE }
123 #define CONFIG_CONS_INDEX 0
124 #define CONFIG_BAUDRATE 115200 /* Default baud rate */
129 #define CONFIG_APBH_DMA
134 #define CONFIG_ENV_IS_IN_MMC
135 #ifdef CONFIG_ENV_IS_IN_MMC
136 #define CONFIG_ENV_OFFSET (256 * 1024)
137 #define CONFIG_ENV_SIZE (16 * 1024)
138 #define CONFIG_SYS_MMC_ENV_DEV 0
140 #define CONFIG_CMD_SAVEENV
141 #ifdef CONFIG_CMD_MMC
143 #define CONFIG_GENERIC_MMC
144 #define CONFIG_MMC_BOUNCE_BUFFER
145 #define CONFIG_MXS_MMC
151 #ifdef CONFIG_CMD_NAND
152 #define CONFIG_NAND_MXS
153 #define CONFIG_SYS_MAX_NAND_DEVICE 1
154 #define CONFIG_SYS_NAND_BASE 0x60000000
155 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
159 * Ethernet on SOC (FEC)
161 #ifdef CONFIG_CMD_NET
162 #define CONFIG_NET_MULTI
163 #define CONFIG_ETHPRIME "FEC0"
164 #define CONFIG_FEC_MXC
165 #define CONFIG_FEC_MXC_MULTI
167 #define CONFIG_FEC_XCV_TYPE RMII
168 #define CONFIG_MX28_FEC_MAC_IN_OCOTP
174 #ifdef CONFIG_CMD_DATE
175 #define CONFIG_RTC_MXS
181 #ifdef CONFIG_CMD_USB
182 #define CONFIG_USB_EHCI
183 #define CONFIG_USB_EHCI_MXS
184 #define CONFIG_EHCI_MXS_PORT 1
185 #define CONFIG_EHCI_IS_TDI
186 #define CONFIG_USB_STORAGE
187 #define CONFIG_USB_HOST_ETHER
188 #define CONFIG_USB_ETHER_ASIX
189 #define CONFIG_USB_ETHER_SMSC95XX
193 #ifdef CONFIG_CMD_I2C
194 #define CONFIG_I2C_MXS
195 #define CONFIG_HARD_I2C
196 #define CONFIG_SYS_I2C_SPEED 400000
202 #ifdef CONFIG_CMD_SPI
203 #define CONFIG_HARD_SPI
204 #define CONFIG_MXS_SPI
205 #define CONFIG_MXS_SPI_DMA_ENABLE
206 #define CONFIG_SPI_HALF_DUPLEX
207 #define CONFIG_DEFAULT_SPI_BUS 2
208 #define CONFIG_DEFAULT_SPI_MODE SPI_MODE_0
212 #define CONFIG_SPI_FLASH
213 #define CONFIG_SF_DEFAULT_BUS 2
214 #define CONFIG_SF_DEFAULT_CS 0
215 /* this may vary and depends on the installed chip */
216 #define CONFIG_SPI_FLASH_SST
217 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
218 #define CONFIG_SF_DEFAULT_SPEED 24000000
220 /* (redundant) environemnt in SPI flash */
221 #ifdef CONFIG_ENV_IS_IN_SPI_FLASH
222 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
223 #define CONFIG_ENV_SIZE 0x1000 /* 4KB */
224 #define CONFIG_ENV_OFFSET 0x40000 /* 256K */
225 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
226 #define CONFIG_ENV_SECT_SIZE 0x1000
227 #define CONFIG_ENV_SPI_CS 0
228 #define CONFIG_ENV_SPI_BUS 2
229 #define CONFIG_ENV_SPI_MAX_HZ 24000000
230 #define CONFIG_ENV_SPI_MODE SPI_MODE_0
238 #define CONFIG_CMDLINE_TAG
239 #define CONFIG_SETUP_MEMORY_TAGS
240 #define CONFIG_BOOTDELAY 3
241 #define CONFIG_BOOTFILE "uImage"
242 #define CONFIG_LOADADDR 0x42000000
243 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
244 #define CONFIG_OF_LIBFDT
249 #define CONFIG_EXTRA_ENV_SETTINGS \
250 "update_nand_full_filename=u-boot.nand\0" \
251 "update_nand_firmware_filename=u-boot.sb\0" \
252 "update_sd_firmware_filename=u-boot.sd\0" \
253 "update_nand_firmware_maxsz=0x100000\0" \
254 "update_nand_stride=0x40\0" /* MX28 datasheet ch. 12.12 */ \
255 "update_nand_count=0x4\0" /* MX28 datasheet ch. 12.12 */ \
256 "update_nand_get_fcb_size=" /* Get size of FCB blocks */ \
259 "setexpr fcb_sz ${update_nand_stride} * ${update_nand_count};" \
260 "setexpr update_nand_fcb ${fcb_sz} * ${nand_writesize}\0" \
261 "update_nand_full=" /* Update FCB, DBBT and FW */ \
262 "if tftp ${update_nand_full_filename} ; then " \
263 "run update_nand_get_fcb_size ; " \
264 "nand scrub -y 0x0 ${filesize} ; " \
265 "nand write.raw ${loadaddr} 0x0 ${update_nand_fcb} ; " \
266 "setexpr update_off ${loadaddr} + ${update_nand_fcb} ; " \
267 "setexpr update_sz ${filesize} - ${update_nand_fcb} ; " \
268 "nand write ${update_off} ${update_nand_fcb} ${update_sz} ; " \
270 "update_nand_firmware=" /* Update only firmware */ \
271 "if tftp ${update_nand_firmware_filename} ; then " \
272 "run update_nand_get_fcb_size ; " \
273 "setexpr fcb_sz ${update_nand_fcb} * 2 ; " /* FCB + DBBT */ \
274 "setexpr fw_sz ${update_nand_firmware_maxsz} * 2 ; " \
275 "setexpr fw_off ${fcb_sz} + ${update_nand_firmware_maxsz};" \
276 "nand erase ${fcb_sz} ${fw_sz} ; " \
277 "nand write ${loadaddr} ${fcb_sz} ${filesize} ; " \
278 "nand write ${loadaddr} ${fw_off} ${filesize} ; " \
280 "update_sd_firmware=" /* Update the SD firmware partition */ \
281 "if mmc rescan ; then " \
282 "if tftp ${update_sd_firmware_filename} ; then " \
283 "setexpr fw_sz ${filesize} / 0x200 ; " /* SD block size */ \
284 "setexpr fw_sz ${fw_sz} + 1 ; " \
285 "mmc write ${loadaddr} 0x800 ${fw_sz} ; " \
288 "script=boot.scr\0" \
290 "console_fsl=ttyAM0\0" \
291 "console_mainline=ttyAMA0\0" \
294 "mmcroot=/dev/mmcblk0p3 rw\0" \
295 "mmcrootfstype=ext3 rootwait\0" \
296 "mmcargs=setenv bootargs console=${console_mainline},${baudrate} " \
298 "rootfstype=${mmcrootfstype}\0" \
300 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
301 "bootscript=echo Running bootscript from mmc ...; " \
303 "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
304 "mmcboot=echo Booting from mmc ...; " \
307 "netargs=setenv bootargs console=${console_mainline},${baudrate} " \
309 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
310 "netboot=echo Booting from net ...; " \
312 "dhcp ${uimage}; bootm\0"
314 #define CONFIG_BOOTCOMMAND \
315 "if mmc rescan ${mmcdev}; then " \
316 "if run loadbootscript; then " \
319 "if run loaduimage; then " \
321 "else run netboot; " \
324 "else run netboot; fi"
326 #endif /* __MX28EVK_CONFIG_H__ */