1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2011 Freescale Semiconductor, Inc.
5 * Configuration settings for the MX53ARD Freescale board.
11 #define CONFIG_MACH_TYPE MACH_TYPE_MX53_ARD
13 #include <asm/arch/imx-regs.h>
15 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
16 #define CONFIG_SETUP_MEMORY_TAGS
17 #define CONFIG_INITRD_TAG
18 #define CONFIG_REVISION_TAG
20 #define CONFIG_SYS_FSL_CLK
22 /* Size of malloc() pool */
23 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
25 #define CONFIG_SYS_MAX_NAND_DEVICE 1
26 #define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR_AXI
27 #define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR_AXI
28 #define CONFIG_MXC_NAND_IP_REGS_BASE NFC_BASE_ADDR
29 #define CONFIG_SYS_NAND_LARGEPAGE
30 #define CONFIG_MXC_NAND_HWECC
31 #define CONFIG_SYS_NAND_USE_FLASH_BBT
33 #define CONFIG_MXC_UART
34 #define CONFIG_MXC_UART_BASE UART1_BASE
37 #define CONFIG_SYS_I2C
38 #define CONFIG_SYS_I2C_MXC
39 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
40 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
41 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
44 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
45 #define CONFIG_SYS_FSL_ESDHC_NUM 2
48 #define CONFIG_HAS_ETH1
51 /* allow to overwrite serial and ethaddr */
52 #define CONFIG_ENV_OVERWRITE
54 /* Command definition */
56 #define CONFIG_ETHPRIME "smc911x"
58 #define CONFIG_LOADADDR 0x72000000 /* loadaddr env var */
60 #define CONFIG_EXTRA_ENV_SETTINGS \
64 "fdt_high=0xffffffff\0" \
65 "initrd_high=0xffffffff\0" \
66 "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
67 "fdt_addr=0x78000000\0" \
70 "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
72 "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
73 "update_sd_firmware_filename=u-boot.imx\0" \
74 "update_sd_firmware=" \
75 "if test ${ip_dyn} = yes; then " \
76 "setenv get_cmd dhcp; " \
78 "setenv get_cmd tftp; " \
80 "if mmc dev ${mmcdev}; then " \
81 "if ${get_cmd} ${update_sd_firmware_filename}; then " \
82 "setexpr fw_sz ${filesize} / 0x200; " \
83 "setexpr fw_sz ${fw_sz} + 1; " \
84 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \
87 "mmcargs=setenv bootargs console=${console},${baudrate} " \
90 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
91 "bootscript=echo Running bootscript from mmc ...; " \
93 "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
94 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
95 "mmcboot=echo Booting from mmc ...; " \
97 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
98 "if run loadfdt; then " \
99 "bootz ${loadaddr} - ${fdt_addr}; " \
101 "if test ${boot_fdt} = try; then " \
104 "echo WARN: Cannot load the DT; " \
110 "netargs=setenv bootargs console=${console},${baudrate} " \
112 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
113 "netboot=echo Booting from net ...; " \
115 "if test ${ip_dyn} = yes; then " \
116 "setenv get_cmd dhcp; " \
118 "setenv get_cmd tftp; " \
120 "${get_cmd} ${uimage}; " \
121 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
122 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
123 "bootz ${loadaddr} - ${fdt_addr}; " \
125 "if test ${boot_fdt} = try; then " \
128 "echo WARN: Cannot load the DT; " \
135 #define CONFIG_BOOTCOMMAND \
136 "mmc dev ${mmcdev}; if mmc rescan; then " \
137 "if run loadbootscript; then " \
140 "if run loaduimage; then " \
142 "else run netboot; " \
145 "else run netboot; fi"
147 #define CONFIG_ARP_TIMEOUT 200UL
149 /* Miscellaneous configurable options */
151 #define CONFIG_SYS_MEMTEST_START 0x70000000
152 #define CONFIG_SYS_MEMTEST_END 0x70010000
154 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
156 /* Physical Memory Map */
157 #define CONFIG_NR_DRAM_BANKS 2
158 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
159 #define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024)
160 #define PHYS_SDRAM_2 CSD1_BASE_ADDR
161 #define PHYS_SDRAM_2_SIZE (512 * 1024 * 1024)
162 #define PHYS_SDRAM_SIZE (PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE)
164 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
165 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
166 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
168 #define CONFIG_SYS_INIT_SP_OFFSET \
169 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
170 #define CONFIG_SYS_INIT_SP_ADDR \
171 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
173 /* environment organization */
174 #define CONFIG_ENV_OFFSET (6 * 64 * 1024)
175 #define CONFIG_ENV_SIZE (8 * 1024)
176 #define CONFIG_SYS_MMC_ENV_DEV 0
178 #define MX53ARD_CS1GCR1 (CSEN | DSZ(2))
179 #define MX53ARD_CS1RCR1 (RCSN(2) | OEN (1) | RWSC(22))
180 #define MX53ARD_CS1RCR2 RBEN(2)
181 #define MX53ARD_CS1WCR1 (WCSN(2) | WEN(2) | WBEN(2) | WWSC(22))
183 #endif /* __CONFIG_H */