2 * Copyright (C) 2011 Freescale Semiconductor, Inc.
4 * Configuration settings for the MX53ARD Freescale board.
6 * SPDX-License-Identifier: GPL-2.0+
14 #define CONFIG_MACH_TYPE MACH_TYPE_MX53_ARD
16 #include <asm/arch/imx-regs.h>
18 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
19 #define CONFIG_SETUP_MEMORY_TAGS
20 #define CONFIG_INITRD_TAG
21 #define CONFIG_REVISION_TAG
23 #define CONFIG_SYS_FSL_CLK
25 /* Size of malloc() pool */
26 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
28 #define CONFIG_BOARD_EARLY_INIT_F
29 #define CONFIG_MXC_GPIO
31 #define CONFIG_SYS_MAX_NAND_DEVICE 1
32 #define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR_AXI
33 #define CONFIG_NAND_MXC
34 #define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR_AXI
35 #define CONFIG_MXC_NAND_IP_REGS_BASE NFC_BASE_ADDR
36 #define CONFIG_SYS_NAND_LARGEPAGE
37 #define CONFIG_MXC_NAND_HWECC
38 #define CONFIG_SYS_NAND_USE_FLASH_BBT
39 #define CONFIG_CMD_NAND
41 #define CONFIG_MXC_UART
42 #define CONFIG_MXC_UART_BASE UART1_BASE
45 #define CONFIG_SYS_I2C
46 #define CONFIG_SYS_I2C_MXC
47 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
48 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
49 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
52 #define CONFIG_FSL_ESDHC
53 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
54 #define CONFIG_SYS_FSL_ESDHC_NUM 2
57 #define CONFIG_GENERIC_MMC
58 #define CONFIG_DOS_PARTITION
61 #define CONFIG_HAS_ETH1
64 /* allow to overwrite serial and ethaddr */
65 #define CONFIG_ENV_OVERWRITE
66 #define CONFIG_CONS_INDEX 1
67 #define CONFIG_BAUDRATE 115200
69 /* Command definition */
71 #define CONFIG_ETHPRIME "smc911x"
74 #define CONFIG_SMC911X
75 #define CONFIG_SMC911X_16_BIT
76 #define CONFIG_SMC911X_BASE CS1_BASE_ADDR
78 #define CONFIG_LOADADDR 0x72000000 /* loadaddr env var */
79 #define CONFIG_SYS_TEXT_BASE 0x77800000
81 #define CONFIG_DEFAULT_FDT_FILE "imx53-ard.dtb"
83 #define CONFIG_EXTRA_ENV_SETTINGS \
87 "fdt_high=0xffffffff\0" \
88 "initrd_high=0xffffffff\0" \
89 "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
90 "fdt_addr=0x78000000\0" \
93 "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
95 "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
96 "update_sd_firmware_filename=u-boot.imx\0" \
97 "update_sd_firmware=" \
98 "if test ${ip_dyn} = yes; then " \
99 "setenv get_cmd dhcp; " \
101 "setenv get_cmd tftp; " \
103 "if mmc dev ${mmcdev}; then " \
104 "if ${get_cmd} ${update_sd_firmware_filename}; then " \
105 "setexpr fw_sz ${filesize} / 0x200; " \
106 "setexpr fw_sz ${fw_sz} + 1; " \
107 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \
110 "mmcargs=setenv bootargs console=${console},${baudrate} " \
111 "root=${mmcroot}\0" \
113 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
114 "bootscript=echo Running bootscript from mmc ...; " \
116 "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
117 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
118 "mmcboot=echo Booting from mmc ...; " \
120 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
121 "if run loadfdt; then " \
122 "bootz ${loadaddr} - ${fdt_addr}; " \
124 "if test ${boot_fdt} = try; then " \
127 "echo WARN: Cannot load the DT; " \
133 "netargs=setenv bootargs console=${console},${baudrate} " \
135 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
136 "netboot=echo Booting from net ...; " \
138 "if test ${ip_dyn} = yes; then " \
139 "setenv get_cmd dhcp; " \
141 "setenv get_cmd tftp; " \
143 "${get_cmd} ${uimage}; " \
144 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
145 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
146 "bootz ${loadaddr} - ${fdt_addr}; " \
148 "if test ${boot_fdt} = try; then " \
151 "echo WARN: Cannot load the DT; " \
158 #define CONFIG_BOOTCOMMAND \
159 "mmc dev ${mmcdev}; if mmc rescan; then " \
160 "if run loadbootscript; then " \
163 "if run loaduimage; then " \
165 "else run netboot; " \
168 "else run netboot; fi"
170 #define CONFIG_ARP_TIMEOUT 200UL
172 /* Miscellaneous configurable options */
173 #define CONFIG_SYS_LONGHELP /* undef to save memory */
174 #define CONFIG_AUTO_COMPLETE
175 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
177 /* Print Buffer Size */
178 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
179 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
180 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
182 #define CONFIG_SYS_MEMTEST_START 0x70000000
183 #define CONFIG_SYS_MEMTEST_END 0x70010000
185 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
187 #define CONFIG_CMDLINE_EDITING
189 /* Physical Memory Map */
190 #define CONFIG_NR_DRAM_BANKS 2
191 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
192 #define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024)
193 #define PHYS_SDRAM_2 CSD1_BASE_ADDR
194 #define PHYS_SDRAM_2_SIZE (512 * 1024 * 1024)
195 #define PHYS_SDRAM_SIZE (PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE)
197 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
198 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
199 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
201 #define CONFIG_SYS_INIT_SP_OFFSET \
202 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
203 #define CONFIG_SYS_INIT_SP_ADDR \
204 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
206 /* FLASH and environment organization */
207 #define CONFIG_SYS_NO_FLASH
209 #define CONFIG_ENV_OFFSET (6 * 64 * 1024)
210 #define CONFIG_ENV_SIZE (8 * 1024)
211 #define CONFIG_ENV_IS_IN_MMC
212 #define CONFIG_SYS_MMC_ENV_DEV 0
214 #define MX53ARD_CS1GCR1 (CSEN | DSZ(2))
215 #define MX53ARD_CS1RCR1 (RCSN(2) | OEN (1) | RWSC(22))
216 #define MX53ARD_CS1RCR2 RBEN(2)
217 #define MX53ARD_CS1WCR1 (WCSN(2) | WEN(2) | WBEN(2) | WWSC(22))
219 #endif /* __CONFIG_H */