2 * Copyright (C) 2010 Freescale Semiconductor, Inc.
4 * Configuration settings for the MX53-EVK Freescale board.
6 * SPDX-License-Identifier: GPL-2.0+
12 #define CONFIG_MACH_TYPE MACH_TYPE_MX53_EVK
14 #include <asm/arch/imx-regs.h>
16 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
17 #define CONFIG_SETUP_MEMORY_TAGS
18 #define CONFIG_INITRD_TAG
19 #define CONFIG_REVISION_TAG
21 #define CONFIG_SYS_FSL_CLK
23 /* Size of malloc() pool */
24 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
26 #define CONFIG_MXC_UART
27 #define CONFIG_MXC_UART_BASE UART1_BASE
30 #define CONFIG_SYS_I2C
31 #define CONFIG_SYS_I2C_MXC
32 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
33 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
34 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
38 #define CONFIG_POWER_I2C
39 #define CONFIG_POWER_FSL
40 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR 8
41 #define CONFIG_POWER_FSL_MC13892
42 #define CONFIG_RTC_MC13XXX
45 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
46 #define CONFIG_SYS_FSL_ESDHC_NUM 2
51 #define CONFIG_FEC_MXC
52 #define IMX_FEC_BASE FEC_BASE_ADDR
53 #define CONFIG_FEC_MXC_PHYADDR 0x1F
55 /* allow to overwrite serial and ethaddr */
56 #define CONFIG_ENV_OVERWRITE
58 /* Command definition */
60 #define CONFIG_ETHPRIME "FEC0"
62 #define CONFIG_LOADADDR 0x70800000 /* loadaddr env var */
64 #define CONFIG_EXTRA_ENV_SETTINGS \
69 "mmcroot=/dev/mmcblk0p3 rw\0" \
70 "mmcrootfstype=ext3 rootwait\0" \
71 "mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \
73 "rootfstype=${mmcrootfstype}\0" \
75 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
76 "bootscript=echo Running bootscript from mmc ...; " \
78 "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
79 "mmcboot=echo Booting from mmc ...; " \
82 "netargs=setenv bootargs console=ttymxc0,${baudrate} " \
84 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
85 "netboot=echo Booting from net ...; " \
87 "dhcp ${uimage}; bootm\0" \
89 #define CONFIG_BOOTCOMMAND \
90 "mmc dev ${mmcdev}; if mmc rescan; then " \
91 "if run loadbootscript; then " \
94 "if run loaduimage; then " \
96 "else run netboot; " \
99 "else run netboot; fi"
101 #define CONFIG_ARP_TIMEOUT 200UL
103 /* Miscellaneous configurable options */
105 #define CONFIG_SYS_MEMTEST_START 0x70000000
106 #define CONFIG_SYS_MEMTEST_END 0x70010000
108 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
110 /* Physical Memory Map */
111 #define CONFIG_NR_DRAM_BANKS 1
112 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
113 #define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024)
115 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
116 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
117 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
119 #define CONFIG_SYS_INIT_SP_OFFSET \
120 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
121 #define CONFIG_SYS_INIT_SP_ADDR \
122 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
124 /* environment organization */
125 #define CONFIG_ENV_OFFSET (6 * 64 * 1024)
126 #define CONFIG_ENV_SIZE (8 * 1024)
127 #define CONFIG_SYS_MMC_ENV_DEV 0
129 #endif /* __CONFIG_H */