2 * Copyright (C) 2010 Freescale Semiconductor, Inc.
4 * Configuration settings for the MX53-EVK Freescale board.
6 * SPDX-License-Identifier: GPL-2.0+
14 #define CONFIG_MACH_TYPE MACH_TYPE_MX53_EVK
16 #include <asm/arch/imx-regs.h>
18 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
19 #define CONFIG_SETUP_MEMORY_TAGS
20 #define CONFIG_INITRD_TAG
21 #define CONFIG_REVISION_TAG
23 #define CONFIG_SYS_FSL_CLK
25 /* Size of malloc() pool */
26 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
28 #define CONFIG_BOARD_EARLY_INIT_F
29 #define CONFIG_MXC_GPIO
31 #define CONFIG_MXC_UART
32 #define CONFIG_MXC_UART_BASE UART1_BASE
35 #define CONFIG_SYS_I2C
36 #define CONFIG_SYS_I2C_MXC
37 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
38 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
39 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
43 #define CONFIG_POWER_I2C
44 #define CONFIG_POWER_FSL
45 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR 8
46 #define CONFIG_POWER_FSL_MC13892
47 #define CONFIG_RTC_MC13XXX
50 #define CONFIG_FSL_ESDHC
51 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
52 #define CONFIG_SYS_FSL_ESDHC_NUM 2
54 #define CONFIG_GENERIC_MMC
55 #define CONFIG_DOS_PARTITION
60 #define CONFIG_FEC_MXC
61 #define IMX_FEC_BASE FEC_BASE_ADDR
62 #define CONFIG_FEC_MXC_PHYADDR 0x1F
64 #define CONFIG_CMD_DATE
66 /* Miscellaneous commands */
67 #define CONFIG_CMD_BMODE
69 /* allow to overwrite serial and ethaddr */
70 #define CONFIG_ENV_OVERWRITE
71 #define CONFIG_CONS_INDEX 1
72 #define CONFIG_BAUDRATE 115200
74 /* Command definition */
76 #define CONFIG_ETHPRIME "FEC0"
78 #define CONFIG_LOADADDR 0x70800000 /* loadaddr env var */
79 #define CONFIG_SYS_TEXT_BASE 0x77800000
81 #define CONFIG_EXTRA_ENV_SETTINGS \
86 "mmcroot=/dev/mmcblk0p3 rw\0" \
87 "mmcrootfstype=ext3 rootwait\0" \
88 "mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \
90 "rootfstype=${mmcrootfstype}\0" \
92 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
93 "bootscript=echo Running bootscript from mmc ...; " \
95 "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
96 "mmcboot=echo Booting from mmc ...; " \
99 "netargs=setenv bootargs console=ttymxc0,${baudrate} " \
101 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
102 "netboot=echo Booting from net ...; " \
104 "dhcp ${uimage}; bootm\0" \
106 #define CONFIG_BOOTCOMMAND \
107 "mmc dev ${mmcdev}; if mmc rescan; then " \
108 "if run loadbootscript; then " \
111 "if run loaduimage; then " \
113 "else run netboot; " \
116 "else run netboot; fi"
118 #define CONFIG_ARP_TIMEOUT 200UL
120 /* Miscellaneous configurable options */
121 #define CONFIG_SYS_LONGHELP /* undef to save memory */
122 #define CONFIG_AUTO_COMPLETE
123 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
125 /* Print Buffer Size */
126 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
127 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
128 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
130 #define CONFIG_SYS_MEMTEST_START 0x70000000
131 #define CONFIG_SYS_MEMTEST_END 0x70010000
133 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
135 #define CONFIG_CMDLINE_EDITING
137 /* Physical Memory Map */
138 #define CONFIG_NR_DRAM_BANKS 1
139 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
140 #define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024)
142 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
143 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
144 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
146 #define CONFIG_SYS_INIT_SP_OFFSET \
147 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
148 #define CONFIG_SYS_INIT_SP_ADDR \
149 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
151 /* FLASH and environment organization */
152 #define CONFIG_SYS_NO_FLASH
154 #define CONFIG_ENV_OFFSET (6 * 64 * 1024)
155 #define CONFIG_ENV_SIZE (8 * 1024)
156 #define CONFIG_ENV_IS_IN_MMC
157 #define CONFIG_SYS_MMC_ENV_DEV 0
159 #endif /* __CONFIG_H */