]> git.sur5r.net Git - u-boot/blob - include/configs/mx53evk.h
Convert CONFIG_MXC_GPIO to Kconfig
[u-boot] / include / configs / mx53evk.h
1 /*
2  * Copyright (C) 2010 Freescale Semiconductor, Inc.
3  *
4  * Configuration settings for the MX53-EVK Freescale board.
5  *
6  * SPDX-License-Identifier:     GPL-2.0+
7  */
8
9 #ifndef __CONFIG_H
10 #define __CONFIG_H
11
12 #define CONFIG_MACH_TYPE        MACH_TYPE_MX53_EVK
13
14 #include <asm/arch/imx-regs.h>
15
16 #define CONFIG_CMDLINE_TAG                      /* enable passing of ATAGs */
17 #define CONFIG_SETUP_MEMORY_TAGS
18 #define CONFIG_INITRD_TAG
19 #define CONFIG_REVISION_TAG
20
21 #define CONFIG_SYS_FSL_CLK
22
23 /* Size of malloc() pool */
24 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
25
26 #define CONFIG_MXC_UART
27 #define CONFIG_MXC_UART_BASE    UART1_BASE
28
29 /* I2C Configs */
30 #define CONFIG_SYS_I2C
31 #define CONFIG_SYS_I2C_MXC
32 #define CONFIG_SYS_I2C_MXC_I2C1         /* enable I2C bus 1 */
33 #define CONFIG_SYS_I2C_MXC_I2C2         /* enable I2C bus 2 */
34 #define CONFIG_SYS_I2C_MXC_I2C3         /* enable I2C bus 3 */
35
36 /* PMIC Configs */
37 #define CONFIG_POWER
38 #define CONFIG_POWER_I2C
39 #define CONFIG_POWER_FSL
40 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR    8
41 #define CONFIG_POWER_FSL_MC13892
42 #define CONFIG_RTC_MC13XXX
43
44 /* MMC Configs */
45 #define CONFIG_FSL_ESDHC
46 #define CONFIG_SYS_FSL_ESDHC_ADDR       0
47 #define CONFIG_SYS_FSL_ESDHC_NUM        2
48
49 /* Eth Configs */
50 #define CONFIG_MII
51
52 #define CONFIG_FEC_MXC
53 #define IMX_FEC_BASE    FEC_BASE_ADDR
54 #define CONFIG_FEC_MXC_PHYADDR  0x1F
55
56 /* allow to overwrite serial and ethaddr */
57 #define CONFIG_ENV_OVERWRITE
58 #define CONFIG_CONS_INDEX               1
59
60 /* Command definition */
61
62 #define CONFIG_ETHPRIME         "FEC0"
63
64 #define CONFIG_LOADADDR         0x70800000      /* loadaddr env var */
65 #define CONFIG_SYS_TEXT_BASE    0x77800000
66
67 #define CONFIG_EXTRA_ENV_SETTINGS \
68         "script=boot.scr\0" \
69         "uimage=uImage\0" \
70         "mmcdev=0\0" \
71         "mmcpart=2\0" \
72         "mmcroot=/dev/mmcblk0p3 rw\0" \
73         "mmcrootfstype=ext3 rootwait\0" \
74         "mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \
75                 "root=${mmcroot} " \
76                 "rootfstype=${mmcrootfstype}\0" \
77         "loadbootscript=" \
78                 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
79         "bootscript=echo Running bootscript from mmc ...; " \
80                 "source\0" \
81         "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
82         "mmcboot=echo Booting from mmc ...; " \
83                 "run mmcargs; " \
84                 "bootm\0" \
85         "netargs=setenv bootargs console=ttymxc0,${baudrate} " \
86                 "root=/dev/nfs " \
87                 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
88         "netboot=echo Booting from net ...; " \
89                 "run netargs; " \
90                 "dhcp ${uimage}; bootm\0" \
91
92 #define CONFIG_BOOTCOMMAND \
93         "mmc dev ${mmcdev}; if mmc rescan; then " \
94                 "if run loadbootscript; then " \
95                         "run bootscript; " \
96                 "else " \
97                         "if run loaduimage; then " \
98                                 "run mmcboot; " \
99                         "else run netboot; " \
100                         "fi; " \
101                 "fi; " \
102         "else run netboot; fi"
103
104 #define CONFIG_ARP_TIMEOUT      200UL
105
106 /* Miscellaneous configurable options */
107 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
108 #define CONFIG_AUTO_COMPLETE
109
110 #define CONFIG_SYS_MEMTEST_START       0x70000000
111 #define CONFIG_SYS_MEMTEST_END         0x70010000
112
113 #define CONFIG_SYS_LOAD_ADDR            CONFIG_LOADADDR
114
115 #define CONFIG_CMDLINE_EDITING
116
117 /* Physical Memory Map */
118 #define CONFIG_NR_DRAM_BANKS    1
119 #define PHYS_SDRAM_1            CSD0_BASE_ADDR
120 #define PHYS_SDRAM_1_SIZE       (512 * 1024 * 1024)
121
122 #define CONFIG_SYS_SDRAM_BASE           (PHYS_SDRAM_1)
123 #define CONFIG_SYS_INIT_RAM_ADDR        (IRAM_BASE_ADDR)
124 #define CONFIG_SYS_INIT_RAM_SIZE        (IRAM_SIZE)
125
126 #define CONFIG_SYS_INIT_SP_OFFSET \
127         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
128 #define CONFIG_SYS_INIT_SP_ADDR \
129         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
130
131 /* environment organization */
132 #define CONFIG_ENV_OFFSET      (6 * 64 * 1024)
133 #define CONFIG_ENV_SIZE        (8 * 1024)
134 #define CONFIG_SYS_MMC_ENV_DEV 0
135
136 #endif                          /* __CONFIG_H */