2 * Copyright (C) 2011 Freescale Semiconductor, Inc.
3 * Jason Liu <r64343@freescale.com>
5 * Configuration settings for Freescale MX53 low cost board.
7 * SPDX-License-Identifier: GPL-2.0+
13 #define CONFIG_MACH_TYPE MACH_TYPE_MX53_LOCO
15 #include <asm/arch/imx-regs.h>
17 #define CONFIG_CMDLINE_TAG
18 #define CONFIG_SETUP_MEMORY_TAGS
19 #define CONFIG_INITRD_TAG
21 #define CONFIG_SYS_FSL_CLK
23 /* Size of malloc() pool */
24 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
26 #define CONFIG_REVISION_TAG
28 #define CONFIG_MXC_UART
29 #define CONFIG_MXC_UART_BASE UART1_BASE
32 #define CONFIG_FSL_ESDHC
33 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
34 #define CONFIG_SYS_FSL_ESDHC_NUM 2
39 #define CONFIG_FEC_MXC
40 #define IMX_FEC_BASE FEC_BASE_ADDR
41 #define CONFIG_FEC_MXC_PHYADDR 0x1F
44 #define CONFIG_USB_EHCI_MX5
45 #define CONFIG_MXC_USB_PORT 1
46 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
47 #define CONFIG_MXC_USB_FLAGS 0
50 #define CONFIG_SYS_I2C
51 #define CONFIG_SYS_I2C_MXC
52 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
53 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
54 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
58 #define CONFIG_POWER_I2C
59 #define CONFIG_DIALOG_POWER
60 #define CONFIG_POWER_FSL
61 #define CONFIG_POWER_FSL_MC13892
62 #define CONFIG_SYS_DIALOG_PMIC_I2C_ADDR 0x48
63 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x8
65 /* allow to overwrite serial and ethaddr */
66 #define CONFIG_ENV_OVERWRITE
68 /* Command definition */
71 #define CONFIG_ETHPRIME "FEC0"
73 #define CONFIG_LOADADDR 0x72000000 /* loadaddr env var */
75 #define CONFIG_EXTRA_ENV_SETTINGS \
78 "fdt_addr=0x71000000\0" \
83 "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \
84 "mmcargs=setenv bootargs console=ttymxc0,${baudrate} root=${mmcroot}\0" \
86 "load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
87 "bootscript=echo Running bootscript from mmc ...; " \
89 "loadimage=load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
90 "loadfdt=load mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
91 "mmcboot=echo Booting from mmc ...; " \
93 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
94 "if run loadfdt; then " \
95 "bootz ${loadaddr} - ${fdt_addr}; " \
97 "if test ${boot_fdt} = try; then " \
100 "echo WARN: Cannot load the DT; " \
106 "netargs=setenv bootargs console=ttymxc0,${baudrate} " \
108 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
109 "netboot=echo Booting from net ...; " \
111 "if test ${ip_dyn} = yes; then " \
112 "setenv get_cmd dhcp; " \
114 "setenv get_cmd tftp; " \
116 "${get_cmd} ${image}; " \
117 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
118 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
119 "bootz ${loadaddr} - ${fdt_addr}; " \
121 "if test ${boot_fdt} = try; then " \
124 "echo ERROR: Cannot load the DT; " \
132 #define CONFIG_BOOTCOMMAND \
133 "mmc dev ${mmcdev}; if mmc rescan; then " \
134 "if run loadbootscript; then " \
137 "if run loadimage; then " \
139 "else run netboot; " \
142 "else run netboot; fi"
144 #define CONFIG_ARP_TIMEOUT 200UL
146 /* Miscellaneous configurable options */
147 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
149 #define CONFIG_SYS_MEMTEST_START 0x70000000
150 #define CONFIG_SYS_MEMTEST_END 0x70010000
152 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
154 /* Physical Memory Map */
155 #define CONFIG_NR_DRAM_BANKS 2
156 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
157 #define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size)
158 #define PHYS_SDRAM_2 CSD1_BASE_ADDR
159 #define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size)
160 #define PHYS_SDRAM_SIZE (gd->ram_size)
162 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
163 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
164 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
166 #define CONFIG_SYS_INIT_SP_OFFSET \
167 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
168 #define CONFIG_SYS_INIT_SP_ADDR \
169 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
171 /* environment organization */
172 #define CONFIG_ENV_OFFSET (6 * 64 * 1024)
173 #define CONFIG_ENV_SIZE (8 * 1024)
174 #define CONFIG_SYS_MMC_ENV_DEV 0
176 #ifdef CONFIG_CMD_SATA
177 #define CONFIG_SYS_SATA_MAX_DEVICE 1
178 #define CONFIG_DWC_AHSATA_PORT_ID 0
179 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_BASE_ADDR
183 /* Framebuffer and LCD */
184 #define CONFIG_PREBOOT
185 #define CONFIG_VIDEO_IPUV3
186 #define CONFIG_VIDEO_BMP_RLE8
187 #define CONFIG_SPLASH_SCREEN
188 #define CONFIG_BMP_16BPP
189 #define CONFIG_VIDEO_LOGO
191 #endif /* __CONFIG_H */