2 * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
4 * Configuration settings for the Freescale i.MX6Q Sabre Lite board.
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of
9 * the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
28 #include "mx6_common.h"
30 #define CONFIG_DISPLAY_CPUINFO
31 #define CONFIG_DISPLAY_BOARDINFO
33 #define CONFIG_MACH_TYPE 3769
35 #include <asm/arch/imx-regs.h>
36 #include <asm/imx-common/gpio.h>
38 #define CONFIG_CMDLINE_TAG
39 #define CONFIG_SETUP_MEMORY_TAGS
40 #define CONFIG_INITRD_TAG
41 #define CONFIG_REVISION_TAG
43 /* Size of malloc() pool */
44 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
46 #define CONFIG_BOARD_EARLY_INIT_F
47 #define CONFIG_MISC_INIT_R
48 #define CONFIG_MXC_GPIO
50 #define CONFIG_MXC_UART
51 #define CONFIG_MXC_UART_BASE UART2_BASE
55 #define CONFIG_SPI_FLASH
56 #define CONFIG_SPI_FLASH_SST
57 #define CONFIG_MXC_SPI
58 #define CONFIG_SF_DEFAULT_BUS 0
59 #define CONFIG_SF_DEFAULT_CS (0|(IMX_GPIO_NR(3, 19)<<8))
60 #define CONFIG_SF_DEFAULT_SPEED 25000000
61 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
65 #define CONFIG_CMD_I2C
66 #define CONFIG_I2C_MULTI_BUS
67 #define CONFIG_I2C_MXC
68 #define CONFIG_SYS_I2C_SPEED 100000
71 #define CONFIG_FSL_ESDHC
72 #define CONFIG_FSL_USDHC
73 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
74 #define CONFIG_SYS_FSL_USDHC_NUM 2
77 #define CONFIG_CMD_MMC
78 #define CONFIG_GENERIC_MMC
79 #define CONFIG_BOUNCE_BUFFER
80 #define CONFIG_CMD_EXT2
81 #define CONFIG_CMD_FAT
82 #define CONFIG_DOS_PARTITION
84 #define CONFIG_CMD_SATA
88 #ifdef CONFIG_CMD_SATA
89 #define CONFIG_DWC_AHSATA
90 #define CONFIG_SYS_SATA_MAX_DEVICE 1
91 #define CONFIG_DWC_AHSATA_PORT_ID 0
92 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
97 #define CONFIG_CMD_PING
98 #define CONFIG_CMD_DHCP
99 #define CONFIG_CMD_MII
100 #define CONFIG_CMD_NET
101 #define CONFIG_FEC_MXC
103 #define IMX_FEC_BASE ENET_BASE_ADDR
104 #define CONFIG_FEC_XCV_TYPE RGMII
105 #define CONFIG_ETHPRIME "FEC"
106 #define CONFIG_FEC_MXC_PHYADDR 6
107 #define CONFIG_PHYLIB
108 #define CONFIG_PHY_MICREL
109 #define CONFIG_PHY_MICREL_KSZ9021
112 #define CONFIG_CMD_USB
113 #define CONFIG_CMD_FAT
114 #define CONFIG_USB_EHCI
115 #define CONFIG_USB_EHCI_MX6
116 #define CONFIG_USB_STORAGE
117 #define CONFIG_USB_HOST_ETHER
118 #define CONFIG_USB_ETHER_ASIX
119 #define CONFIG_USB_ETHER_SMSC95XX
120 #define CONFIG_MXC_USB_PORT 1
121 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
122 #define CONFIG_MXC_USB_FLAGS 0
124 /* Miscellaneous commands */
125 #define CONFIG_CMD_BMODE
127 /* Framebuffer and LCD */
129 #define CONFIG_VIDEO_IPUV3
130 #define CONFIG_CFB_CONSOLE
131 #define CONFIG_VGA_AS_SINGLE_DEVICE
132 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
133 #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
134 #define CONFIG_VIDEO_BMP_RLE8
135 #define CONFIG_SPLASH_SCREEN
136 #define CONFIG_BMP_16BPP
137 #define CONFIG_VIDEO_LOGO
138 #define CONFIG_IPUV3_CLK 260000000
140 /* allow to overwrite serial and ethaddr */
141 #define CONFIG_ENV_OVERWRITE
142 #define CONFIG_CONS_INDEX 1
143 #define CONFIG_BAUDRATE 115200
145 /* Command definition */
146 #include <config_cmd_default.h>
148 #undef CONFIG_CMD_IMLS
150 #define CONFIG_BOOTDELAY 1
152 #define CONFIG_PREBOOT ""
154 #define CONFIG_LOADADDR 0x12000000
155 #define CONFIG_SYS_TEXT_BASE 0x17800000
157 #define CONFIG_EXTRA_ENV_SETTINGS \
158 "script=boot.scr\0" \
160 "console=ttymxc1\0" \
161 "fdt_high=0xffffffff\0" \
162 "initrd_high=0xffffffff\0" \
163 "fdt_file=imx6q-sabrelite.dtb\0" \
164 "fdt_addr=0x11000000\0" \
169 "mmcroot=/dev/mmcblk0p3 rootwait rw\0" \
170 "mmcargs=setenv bootargs console=${console},${baudrate} " \
171 "root=${mmcroot}\0" \
173 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
174 "bootscript=echo Running bootscript from mmc ...; " \
176 "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
177 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
178 "mmcboot=echo Booting from mmc ...; " \
180 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
181 "if run loadfdt; then " \
182 "bootm ${loadaddr} - ${fdt_addr}; " \
184 "if test ${boot_fdt} = try; then " \
187 "echo WARN: Cannot load the DT; " \
193 "netargs=setenv bootargs console=${console},${baudrate} " \
195 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
196 "netboot=echo Booting from net ...; " \
198 "if test ${ip_dyn} = yes; then " \
199 "setenv get_cmd dhcp; " \
201 "setenv get_cmd tftp; " \
203 "${get_cmd} ${uimage}; " \
204 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
205 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
206 "bootm ${loadaddr} - ${fdt_addr}; " \
208 "if test ${boot_fdt} = try; then " \
211 "echo WARN: Cannot load the DT; " \
218 #define CONFIG_BOOTCOMMAND \
219 "mmc dev ${mmcdev}; if mmc rescan; then " \
220 "if run loadbootscript; then " \
223 "if run loaduimage; then " \
225 "else run netboot; " \
228 "else run netboot; fi"
230 /* Miscellaneous configurable options */
231 #define CONFIG_SYS_LONGHELP
232 #define CONFIG_SYS_HUSH_PARSER
233 #define CONFIG_SYS_PROMPT "MX6QSABRELITE U-Boot > "
234 #define CONFIG_AUTO_COMPLETE
235 #define CONFIG_SYS_CBSIZE 256
237 /* Print Buffer Size */
238 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
239 #define CONFIG_SYS_MAXARGS 16
240 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
242 #define CONFIG_SYS_MEMTEST_START 0x10000000
243 #define CONFIG_SYS_MEMTEST_END 0x10010000
244 #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
246 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
247 #define CONFIG_SYS_HZ 1000
249 #define CONFIG_CMDLINE_EDITING
251 /* Physical Memory Map */
252 #define CONFIG_NR_DRAM_BANKS 1
253 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
254 #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
256 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
257 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
258 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
260 #define CONFIG_SYS_INIT_SP_OFFSET \
261 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
262 #define CONFIG_SYS_INIT_SP_ADDR \
263 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
265 /* FLASH and environment organization */
266 #define CONFIG_SYS_NO_FLASH
268 #define CONFIG_ENV_SIZE (8 * 1024)
270 #define CONFIG_ENV_IS_IN_MMC
271 /* #define CONFIG_ENV_IS_IN_SPI_FLASH */
273 #if defined(CONFIG_ENV_IS_IN_MMC)
274 #define CONFIG_ENV_OFFSET (6 * 64 * 1024)
275 #define CONFIG_SYS_MMC_ENV_DEV 0
276 #elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
277 #define CONFIG_ENV_OFFSET (768 * 1024)
278 #define CONFIG_ENV_SECT_SIZE (8 * 1024)
279 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
280 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
281 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
282 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
285 #define CONFIG_OF_LIBFDT
286 #define CONFIG_CMD_BOOTZ
288 #ifndef CONFIG_SYS_DCACHE_OFF
289 #define CONFIG_CMD_CACHE
292 #endif /* __CONFIG_H */