2 * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
4 * Configuration settings for the Freescale i.MX6Q Sabre Lite board.
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of
9 * the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
28 #include "mx6_common.h"
30 #define CONFIG_DISPLAY_CPUINFO
31 #define CONFIG_DISPLAY_BOARDINFO
33 #define CONFIG_MACH_TYPE 3769
35 #include <asm/arch/imx-regs.h>
36 #include <asm/imx-common/gpio.h>
38 #define CONFIG_CMDLINE_TAG
39 #define CONFIG_SETUP_MEMORY_TAGS
40 #define CONFIG_INITRD_TAG
41 #define CONFIG_REVISION_TAG
43 /* Size of malloc() pool */
44 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
46 #define CONFIG_BOARD_EARLY_INIT_F
47 #define CONFIG_MISC_INIT_R
48 #define CONFIG_MXC_GPIO
50 #define CONFIG_CMD_FUSE
51 #ifdef CONFIG_CMD_FUSE
52 #define CONFIG_MXC_OCOTP
55 #define CONFIG_MXC_UART
56 #define CONFIG_MXC_UART_BASE UART2_BASE
60 #define CONFIG_SPI_FLASH
61 #define CONFIG_SPI_FLASH_SST
62 #define CONFIG_MXC_SPI
63 #define CONFIG_SF_DEFAULT_BUS 0
64 #define CONFIG_SF_DEFAULT_CS (0|(IMX_GPIO_NR(3, 19)<<8))
65 #define CONFIG_SF_DEFAULT_SPEED 25000000
66 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
70 #define CONFIG_CMD_I2C
71 #define CONFIG_I2C_MULTI_BUS
72 #define CONFIG_I2C_MXC
73 #define CONFIG_SYS_I2C_SPEED 100000
76 #define CONFIG_FSL_ESDHC
77 #define CONFIG_FSL_USDHC
78 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
79 #define CONFIG_SYS_FSL_USDHC_NUM 2
82 #define CONFIG_CMD_MMC
83 #define CONFIG_GENERIC_MMC
84 #define CONFIG_BOUNCE_BUFFER
85 #define CONFIG_CMD_EXT2
86 #define CONFIG_CMD_FAT
87 #define CONFIG_DOS_PARTITION
89 #define CONFIG_CMD_SATA
93 #ifdef CONFIG_CMD_SATA
94 #define CONFIG_DWC_AHSATA
95 #define CONFIG_SYS_SATA_MAX_DEVICE 1
96 #define CONFIG_DWC_AHSATA_PORT_ID 0
97 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
102 #define CONFIG_CMD_PING
103 #define CONFIG_CMD_DHCP
104 #define CONFIG_CMD_MII
105 #define CONFIG_CMD_NET
106 #define CONFIG_FEC_MXC
108 #define IMX_FEC_BASE ENET_BASE_ADDR
109 #define CONFIG_FEC_XCV_TYPE RGMII
110 #define CONFIG_ETHPRIME "FEC"
111 #define CONFIG_FEC_MXC_PHYADDR 6
112 #define CONFIG_PHYLIB
113 #define CONFIG_PHY_MICREL
114 #define CONFIG_PHY_MICREL_KSZ9021
117 #define CONFIG_CMD_USB
118 #define CONFIG_CMD_FAT
119 #define CONFIG_USB_EHCI
120 #define CONFIG_USB_EHCI_MX6
121 #define CONFIG_USB_STORAGE
122 #define CONFIG_USB_HOST_ETHER
123 #define CONFIG_USB_ETHER_ASIX
124 #define CONFIG_USB_ETHER_SMSC95XX
125 #define CONFIG_MXC_USB_PORT 1
126 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
127 #define CONFIG_MXC_USB_FLAGS 0
129 /* Miscellaneous commands */
130 #define CONFIG_CMD_BMODE
132 /* Framebuffer and LCD */
134 #define CONFIG_VIDEO_IPUV3
135 #define CONFIG_CFB_CONSOLE
136 #define CONFIG_VGA_AS_SINGLE_DEVICE
137 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
138 #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
139 #define CONFIG_VIDEO_BMP_RLE8
140 #define CONFIG_SPLASH_SCREEN
141 #define CONFIG_BMP_16BPP
142 #define CONFIG_VIDEO_LOGO
143 #define CONFIG_IPUV3_CLK 260000000
145 /* allow to overwrite serial and ethaddr */
146 #define CONFIG_ENV_OVERWRITE
147 #define CONFIG_CONS_INDEX 1
148 #define CONFIG_BAUDRATE 115200
150 /* Command definition */
151 #include <config_cmd_default.h>
153 #undef CONFIG_CMD_IMLS
155 #define CONFIG_BOOTDELAY 1
157 #define CONFIG_PREBOOT ""
159 #define CONFIG_LOADADDR 0x12000000
160 #define CONFIG_SYS_TEXT_BASE 0x17800000
162 #define CONFIG_EXTRA_ENV_SETTINGS \
163 "script=boot.scr\0" \
165 "console=ttymxc1\0" \
166 "fdt_high=0xffffffff\0" \
167 "initrd_high=0xffffffff\0" \
168 "fdt_file=imx6q-sabrelite.dtb\0" \
169 "fdt_addr=0x11000000\0" \
174 "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
175 "mmcargs=setenv bootargs console=${console},${baudrate} " \
176 "root=${mmcroot}\0" \
178 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
179 "bootscript=echo Running bootscript from mmc ...; " \
181 "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
182 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
183 "mmcboot=echo Booting from mmc ...; " \
185 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
186 "if run loadfdt; then " \
187 "bootm ${loadaddr} - ${fdt_addr}; " \
189 "if test ${boot_fdt} = try; then " \
192 "echo WARN: Cannot load the DT; " \
198 "netargs=setenv bootargs console=${console},${baudrate} " \
200 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
201 "netboot=echo Booting from net ...; " \
203 "if test ${ip_dyn} = yes; then " \
204 "setenv get_cmd dhcp; " \
206 "setenv get_cmd tftp; " \
208 "${get_cmd} ${uimage}; " \
209 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
210 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
211 "bootm ${loadaddr} - ${fdt_addr}; " \
213 "if test ${boot_fdt} = try; then " \
216 "echo WARN: Cannot load the DT; " \
223 #define CONFIG_BOOTCOMMAND \
224 "mmc dev ${mmcdev}; if mmc rescan; then " \
225 "if run loadbootscript; then " \
228 "if run loaduimage; then " \
230 "else run netboot; " \
233 "else run netboot; fi"
235 /* Miscellaneous configurable options */
236 #define CONFIG_SYS_LONGHELP
237 #define CONFIG_SYS_HUSH_PARSER
238 #define CONFIG_SYS_PROMPT "MX6QSABRELITE U-Boot > "
239 #define CONFIG_AUTO_COMPLETE
240 #define CONFIG_SYS_CBSIZE 256
242 /* Print Buffer Size */
243 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
244 #define CONFIG_SYS_MAXARGS 16
245 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
247 #define CONFIG_SYS_MEMTEST_START 0x10000000
248 #define CONFIG_SYS_MEMTEST_END 0x10010000
249 #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
251 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
252 #define CONFIG_SYS_HZ 1000
254 #define CONFIG_CMDLINE_EDITING
256 /* Physical Memory Map */
257 #define CONFIG_NR_DRAM_BANKS 1
258 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
259 #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
261 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
262 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
263 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
265 #define CONFIG_SYS_INIT_SP_OFFSET \
266 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
267 #define CONFIG_SYS_INIT_SP_ADDR \
268 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
270 /* FLASH and environment organization */
271 #define CONFIG_SYS_NO_FLASH
273 #define CONFIG_ENV_SIZE (8 * 1024)
275 #define CONFIG_ENV_IS_IN_MMC
276 /* #define CONFIG_ENV_IS_IN_SPI_FLASH */
278 #if defined(CONFIG_ENV_IS_IN_MMC)
279 #define CONFIG_ENV_OFFSET (6 * 64 * 1024)
280 #define CONFIG_SYS_MMC_ENV_DEV 0
281 #elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
282 #define CONFIG_ENV_OFFSET (768 * 1024)
283 #define CONFIG_ENV_SECT_SIZE (8 * 1024)
284 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
285 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
286 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
287 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
290 #define CONFIG_OF_LIBFDT
291 #define CONFIG_CMD_BOOTZ
293 #ifndef CONFIG_SYS_DCACHE_OFF
294 #define CONFIG_CMD_CACHE
297 #endif /* __CONFIG_H */