2 * Copyright 2014 Freescale Semiconductor, Inc.
4 * Configuration settings for the Freescale i.MX6SX Sabresd board.
6 * SPDX-License-Identifier: GPL-2.0+
13 #include "mx6_common.h"
16 #define CONFIG_SPL_LIBCOMMON_SUPPORT
17 #define CONFIG_SPL_MMC_SUPPORT
21 /* Size of malloc() pool */
22 #define CONFIG_SYS_MALLOC_LEN (3 * SZ_1M)
24 #define CONFIG_BOARD_EARLY_INIT_F
26 #define CONFIG_MXC_UART
27 #define CONFIG_MXC_UART_BASE UART1_BASE
29 #define CONFIG_EXTRA_ENV_SETTINGS \
33 "fdt_high=0xffffffff\0" \
34 "initrd_high=0xffffffff\0" \
35 "fdt_file=imx6sx-sdb.dtb\0" \
36 "fdt_addr=0x88000000\0" \
39 "videomode=video=ctfb:x:800,y:480,depth:24,pclk:29850,le:89,ri:164,up:23,lo:10,hs:10,vs:10,sync:0,vmode:0\0" \
42 "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
43 "mmcargs=setenv bootargs console=${console},${baudrate} " \
46 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
47 "bootscript=echo Running bootscript from mmc ...; " \
49 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
50 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
51 "mmcboot=echo Booting from mmc ...; " \
53 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
54 "if run loadfdt; then " \
55 "bootz ${loadaddr} - ${fdt_addr}; " \
57 "if test ${boot_fdt} = try; then " \
60 "echo WARN: Cannot load the DT; " \
66 "netargs=setenv bootargs console=${console},${baudrate} " \
68 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
69 "netboot=echo Booting from net ...; " \
71 "if test ${ip_dyn} = yes; then " \
72 "setenv get_cmd dhcp; " \
74 "setenv get_cmd tftp; " \
76 "${get_cmd} ${image}; " \
77 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
78 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
79 "bootz ${loadaddr} - ${fdt_addr}; " \
81 "if test ${boot_fdt} = try; then " \
84 "echo WARN: Cannot load the DT; " \
91 #define CONFIG_BOOTCOMMAND \
92 "mmc dev ${mmcdev};" \
93 "mmc dev ${mmcdev}; if mmc rescan; then " \
94 "if run loadbootscript; then " \
97 "if run loadimage; then " \
99 "else run netboot; " \
102 "else run netboot; fi"
104 /* Miscellaneous configurable options */
105 #define CONFIG_SYS_MEMTEST_START 0x80000000
106 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x10000)
108 #define CONFIG_STACKSIZE SZ_128K
110 /* Physical Memory Map */
111 #define CONFIG_NR_DRAM_BANKS 1
112 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
113 #define PHYS_SDRAM_SIZE SZ_1G
115 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
116 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
117 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
119 #define CONFIG_SYS_INIT_SP_OFFSET \
120 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
121 #define CONFIG_SYS_INIT_SP_ADDR \
122 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
124 /* MMC Configuration */
125 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC4_BASE_ADDR
128 #define CONFIG_CMD_I2C
129 #define CONFIG_SYS_I2C
130 #define CONFIG_SYS_I2C_MXC
131 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
132 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
133 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
134 #define CONFIG_SYS_I2C_SPEED 100000
138 #define CONFIG_POWER_I2C
139 #define CONFIG_POWER_PFUZE100
140 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
143 #define CONFIG_CMD_PING
144 #define CONFIG_CMD_DHCP
145 #define CONFIG_CMD_MII
146 #define CONFIG_FEC_MXC
149 #define IMX_FEC_BASE ENET_BASE_ADDR
150 #define CONFIG_FEC_MXC_PHYADDR 0x1
152 #define CONFIG_FEC_XCV_TYPE RGMII
153 #define CONFIG_ETHPRIME "FEC"
155 #define CONFIG_PHYLIB
156 #define CONFIG_PHY_ATHEROS
159 #define CONFIG_CMD_USB
160 #ifdef CONFIG_CMD_USB
161 #define CONFIG_USB_EHCI
162 #define CONFIG_USB_EHCI_MX6
163 #define CONFIG_USB_STORAGE
164 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
165 #define CONFIG_USB_HOST_ETHER
166 #define CONFIG_USB_ETHER_ASIX
167 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
168 #define CONFIG_MXC_USB_FLAGS 0
169 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
172 #define CONFIG_CMD_PCI
173 #ifdef CONFIG_CMD_PCI
175 #define CONFIG_PCI_PNP
176 #define CONFIG_PCI_SCAN_SHOW
177 #define CONFIG_PCIE_IMX
178 #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(2, 0)
179 #define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(2, 1)
182 #define CONFIG_IMX_THERMAL
184 #define CONFIG_CMD_TIME
187 #ifdef CONFIG_FSL_QSPI
188 #define CONFIG_CMD_SF
189 #define CONFIG_SYS_FSL_QSPI_LE
190 #define CONFIG_SYS_FSL_QSPI_AHB
191 #ifdef CONFIG_MX6SX_SABRESD_REVA
192 #define FSL_QSPI_FLASH_SIZE SZ_16M
194 #define FSL_QSPI_FLASH_SIZE SZ_32M
196 #define FSL_QSPI_FLASH_NUM 2
199 #ifndef CONFIG_SPL_BUILD
202 #define CONFIG_CFB_CONSOLE
203 #define CONFIG_VIDEO_MXS
204 #define CONFIG_VIDEO_LOGO
205 #define CONFIG_VIDEO_SW_CURSOR
206 #define CONFIG_VGA_AS_SINGLE_DEVICE
207 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
208 #define CONFIG_SPLASH_SCREEN
209 #define CONFIG_SPLASH_SCREEN_ALIGN
210 #define CONFIG_CMD_BMP
211 #define CONFIG_BMP_16BPP
212 #define CONFIG_VIDEO_BMP_RLE8
213 #define CONFIG_VIDEO_BMP_LOGO
214 #define MXS_LCDIF_BASE MX6SX_LCDIF1_BASE_ADDR
218 #define CONFIG_ENV_OFFSET (8 * SZ_64K)
219 #define CONFIG_ENV_SIZE SZ_8K
220 #define CONFIG_ENV_IS_IN_MMC
222 #define CONFIG_SYS_FSL_USDHC_NUM 3
223 #if defined(CONFIG_ENV_IS_IN_MMC)
224 #define CONFIG_SYS_MMC_ENV_DEV 2 /*USDHC4*/
227 #endif /* __CONFIG_H */