2 * Copyright (C) 2015 Freescale Semiconductor, Inc.
4 * Configuration settings for the Freescale i.MX6UL 14x14 EVK board.
6 * SPDX-License-Identifier: GPL-2.0+
8 #ifndef __MX6UL_14X14_EVK_CONFIG_H
9 #define __MX6UL_14X14_EVK_CONFIG_H
11 #include <asm/arch/imx-regs.h>
12 #include <linux/sizes.h>
13 #include "mx6_common.h"
14 #include <asm/imx-common/gpio.h>
16 #define is_mx6ul_9x9_evk() CONFIG_IS_ENABLED(TARGET_MX6UL_9X9_EVK)
21 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
23 /* Size of malloc() pool */
24 #define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M)
26 #define CONFIG_BOARD_EARLY_INIT_F
28 #define CONFIG_MXC_UART
29 #define CONFIG_MXC_UART_BASE UART1_BASE
32 #ifdef CONFIG_FSL_USDHC
33 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
35 /* NAND pin conflicts with usdhc2 */
36 #ifdef CONFIG_NAND_MXS
37 #define CONFIG_SYS_FSL_USDHC_NUM 1
39 #define CONFIG_SYS_FSL_USDHC_NUM 2
46 #define CONFIG_SYS_I2C
47 #define CONFIG_SYS_I2C_MXC
48 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
49 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
50 #define CONFIG_SYS_I2C_SPEED 100000
52 /* PMIC only for 9X9 EVK */
54 #define CONFIG_POWER_I2C
55 #define CONFIG_POWER_PFUZE3000
56 #define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08
59 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1
61 #define CONFIG_EXTRA_ENV_SETTINGS \
65 "fdt_high=0xffffffff\0" \
66 "initrd_high=0xffffffff\0" \
67 "fdt_file=undefined\0" \
68 "fdt_addr=0x83000000\0" \
71 "videomode=video=ctfb:x:480,y:272,depth:24,pclk:108695,le:8,ri:4,up:2,lo:4,hs:41,vs:10,sync:0,vmode:0\0" \
72 "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
73 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
74 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
75 "mmcautodetect=yes\0" \
76 "mmcargs=setenv bootargs console=${console},${baudrate} " \
79 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
80 "bootscript=echo Running bootscript from mmc ...; " \
82 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
83 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
84 "mmcboot=echo Booting from mmc ...; " \
86 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
87 "if run loadfdt; then " \
88 "bootz ${loadaddr} - ${fdt_addr}; " \
90 "if test ${boot_fdt} = try; then " \
93 "echo WARN: Cannot load the DT; " \
99 "netargs=setenv bootargs console=${console},${baudrate} " \
101 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
102 "netboot=echo Booting from net ...; " \
104 "if test ${ip_dyn} = yes; then " \
105 "setenv get_cmd dhcp; " \
107 "setenv get_cmd tftp; " \
109 "${get_cmd} ${image}; " \
110 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
111 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
112 "bootz ${loadaddr} - ${fdt_addr}; " \
114 "if test ${boot_fdt} = try; then " \
117 "echo WARN: Cannot load the DT; " \
124 "if test $fdt_file = undefined; then " \
125 "if test $board_name = EVK && test $board_rev = 9X9; then " \
126 "setenv fdt_file imx6ul-9x9-evk.dtb; fi; " \
127 "if test $board_name = EVK && test $board_rev = 14X14; then " \
128 "setenv fdt_file imx6ul-14x14-evk.dtb; fi; " \
129 "if test $fdt_file = undefined; then " \
130 "echo WARNING: Could not determine dtb to use; fi; " \
133 #define CONFIG_BOOTCOMMAND \
135 "mmc dev ${mmcdev};" \
136 "mmc dev ${mmcdev}; if mmc rescan; then " \
137 "if run loadbootscript; then " \
140 "if run loadimage; then " \
142 "else run netboot; " \
145 "else run netboot; fi"
147 /* Miscellaneous configurable options */
148 #define CONFIG_SYS_MEMTEST_START 0x80000000
149 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x8000000)
151 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
152 #define CONFIG_SYS_HZ 1000
154 #define CONFIG_CMDLINE_EDITING
155 #define CONFIG_STACKSIZE SZ_128K
157 /* Physical Memory Map */
158 #define CONFIG_NR_DRAM_BANKS 1
159 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
161 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
162 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
163 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
165 #define CONFIG_SYS_INIT_SP_OFFSET \
166 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
167 #define CONFIG_SYS_INIT_SP_ADDR \
168 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
170 /* FLASH and environment organization */
171 #define CONFIG_SYS_NO_FLASH
173 #define CONFIG_ENV_SIZE SZ_8K
174 #define CONFIG_ENV_IS_IN_MMC
175 #define CONFIG_ENV_OFFSET (8 * SZ_64K)
176 #define CONFIG_SYS_MMC_ENV_DEV 1 /* USDHC2 */
177 #define CONFIG_SYS_MMC_ENV_PART 0 /* user area */
178 #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */
180 #define CONFIG_CMD_BMODE
182 #ifndef CONFIG_SYS_DCACHE_OFF
185 #ifdef CONFIG_FSL_QSPI
186 #define CONFIG_SF_DEFAULT_BUS 0
187 #define CONFIG_SF_DEFAULT_CS 0
188 #define CONFIG_SF_DEFAULT_SPEED 40000000
189 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
190 #define FSL_QSPI_FLASH_NUM 1
191 #define FSL_QSPI_FLASH_SIZE SZ_32M
195 #ifdef CONFIG_CMD_USB
196 #define CONFIG_USB_EHCI
197 #define CONFIG_USB_EHCI_MX6
198 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
199 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
200 #define CONFIG_MXC_USB_FLAGS 0
201 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
204 #ifdef CONFIG_CMD_NET
205 #define CONFIG_FEC_MXC
207 #define CONFIG_FEC_ENET_DEV 1
209 #if (CONFIG_FEC_ENET_DEV == 0)
210 #define IMX_FEC_BASE ENET_BASE_ADDR
211 #define CONFIG_FEC_MXC_PHYADDR 0x2
212 #define CONFIG_FEC_XCV_TYPE RMII
213 #elif (CONFIG_FEC_ENET_DEV == 1)
214 #define IMX_FEC_BASE ENET2_BASE_ADDR
215 #define CONFIG_FEC_MXC_PHYADDR 0x1
216 #define CONFIG_FEC_XCV_TYPE RMII
218 #define CONFIG_ETHPRIME "FEC"
220 #define CONFIG_PHYLIB
221 #define CONFIG_PHY_MICREL
224 #define CONFIG_IMX_THERMAL
226 #ifndef CONFIG_SPL_BUILD
228 #define CONFIG_VIDEO_MXS
229 #define CONFIG_VIDEO_LOGO
230 #define CONFIG_SPLASH_SCREEN
231 #define CONFIG_SPLASH_SCREEN_ALIGN
232 #define CONFIG_CMD_BMP
233 #define CONFIG_BMP_16BPP
234 #define CONFIG_VIDEO_BMP_RLE8
235 #define CONFIG_VIDEO_BMP_LOGO
236 #define MXS_LCDIF_BASE MX6UL_LCDIF1_BASE_ADDR