1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2015 Freescale Semiconductor, Inc.
5 * Configuration settings for the Freescale i.MX6UL 14x14 EVK board.
7 #ifndef __MX6UL_14X14_EVK_CONFIG_H
8 #define __MX6UL_14X14_EVK_CONFIG_H
10 #include <asm/arch/imx-regs.h>
11 #include <linux/sizes.h>
12 #include "mx6_common.h"
13 #include <asm/mach-imx/gpio.h>
15 #define is_mx6ul_9x9_evk() CONFIG_IS_ENABLED(TARGET_MX6UL_9X9_EVK)
20 /* Size of malloc() pool */
21 #define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M)
23 #define CONFIG_MXC_UART
24 #define CONFIG_MXC_UART_BASE UART1_BASE
27 #ifdef CONFIG_FSL_USDHC
28 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
30 /* NAND pin conflicts with usdhc2 */
31 #ifdef CONFIG_NAND_MXS
32 #define CONFIG_SYS_FSL_USDHC_NUM 1
34 #define CONFIG_SYS_FSL_USDHC_NUM 2
41 #define CONFIG_SYS_I2C
42 #define CONFIG_SYS_I2C_MXC
43 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
44 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
45 #define CONFIG_SYS_I2C_SPEED 100000
47 /* PMIC only for 9X9 EVK */
49 #define CONFIG_POWER_I2C
50 #define CONFIG_POWER_PFUZE3000
51 #define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08
54 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1
56 #define CONFIG_EXTRA_ENV_SETTINGS \
60 "fdt_high=0xffffffff\0" \
61 "initrd_high=0xffffffff\0" \
62 "fdt_file=undefined\0" \
63 "fdt_addr=0x83000000\0" \
66 "videomode=video=ctfb:x:480,y:272,depth:24,pclk:108695,le:8,ri:4,up:2,lo:4,hs:41,vs:10,sync:0,vmode:0\0" \
67 "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
68 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
69 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
70 "mmcautodetect=yes\0" \
71 "mmcargs=setenv bootargs console=${console},${baudrate} " \
74 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
75 "bootscript=echo Running bootscript from mmc ...; " \
77 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
78 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
79 "mmcboot=echo Booting from mmc ...; " \
81 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
82 "if run loadfdt; then " \
83 "bootz ${loadaddr} - ${fdt_addr}; " \
85 "if test ${boot_fdt} = try; then " \
88 "echo WARN: Cannot load the DT; " \
94 "netargs=setenv bootargs console=${console},${baudrate} " \
96 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
97 "netboot=echo Booting from net ...; " \
99 "if test ${ip_dyn} = yes; then " \
100 "setenv get_cmd dhcp; " \
102 "setenv get_cmd tftp; " \
104 "${get_cmd} ${image}; " \
105 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
106 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
107 "bootz ${loadaddr} - ${fdt_addr}; " \
109 "if test ${boot_fdt} = try; then " \
112 "echo WARN: Cannot load the DT; " \
119 "if test $fdt_file = undefined; then " \
120 "if test $board_name = EVK && test $board_rev = 9X9; then " \
121 "setenv fdt_file imx6ul-9x9-evk.dtb; fi; " \
122 "if test $board_name = EVK && test $board_rev = 14X14; then " \
123 "setenv fdt_file imx6ul-14x14-evk.dtb; fi; " \
124 "if test $fdt_file = undefined; then " \
125 "echo WARNING: Could not determine dtb to use; fi; " \
128 #define CONFIG_BOOTCOMMAND \
130 "mmc dev ${mmcdev};" \
131 "mmc dev ${mmcdev}; if mmc rescan; then " \
132 "if run loadbootscript; then " \
135 "if run loadimage; then " \
137 "else run netboot; " \
140 "else run netboot; fi"
142 /* Miscellaneous configurable options */
143 #define CONFIG_SYS_MEMTEST_START 0x80000000
144 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x8000000)
146 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
147 #define CONFIG_SYS_HZ 1000
149 /* Physical Memory Map */
150 #define CONFIG_NR_DRAM_BANKS 1
151 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
153 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
154 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
155 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
157 #define CONFIG_SYS_INIT_SP_OFFSET \
158 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
159 #define CONFIG_SYS_INIT_SP_ADDR \
160 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
162 /* environment organization */
163 #define CONFIG_ENV_SIZE SZ_8K
164 #define CONFIG_ENV_OFFSET (8 * SZ_64K)
165 #define CONFIG_SYS_MMC_ENV_DEV 1 /* USDHC2 */
166 #define CONFIG_SYS_MMC_ENV_PART 0 /* user area */
167 #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */
169 #ifndef CONFIG_SYS_DCACHE_OFF
172 #ifdef CONFIG_FSL_QSPI
173 #define CONFIG_SF_DEFAULT_BUS 0
174 #define CONFIG_SF_DEFAULT_CS 0
175 #define CONFIG_SF_DEFAULT_SPEED 40000000
176 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
177 #define FSL_QSPI_FLASH_NUM 1
178 #define FSL_QSPI_FLASH_SIZE SZ_32M
182 #ifdef CONFIG_CMD_USB
183 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
184 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
185 #define CONFIG_MXC_USB_FLAGS 0
186 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
189 #ifdef CONFIG_CMD_NET
190 #define CONFIG_FEC_MXC
192 #define CONFIG_FEC_ENET_DEV 1
194 #if (CONFIG_FEC_ENET_DEV == 0)
195 #define IMX_FEC_BASE ENET_BASE_ADDR
196 #define CONFIG_FEC_MXC_PHYADDR 0x2
197 #define CONFIG_FEC_XCV_TYPE RMII
198 #elif (CONFIG_FEC_ENET_DEV == 1)
199 #define IMX_FEC_BASE ENET2_BASE_ADDR
200 #define CONFIG_FEC_MXC_PHYADDR 0x1
201 #define CONFIG_FEC_XCV_TYPE RMII
203 #define CONFIG_ETHPRIME "FEC"
206 #define CONFIG_IMX_THERMAL
208 #ifndef CONFIG_SPL_BUILD
210 #define CONFIG_VIDEO_MXS
211 #define CONFIG_VIDEO_LOGO
212 #define CONFIG_SPLASH_SCREEN
213 #define CONFIG_SPLASH_SCREEN_ALIGN
214 #define CONFIG_BMP_16BPP
215 #define CONFIG_VIDEO_BMP_RLE8
216 #define CONFIG_VIDEO_BMP_LOGO
217 #define MXS_LCDIF_BASE MX6UL_LCDIF1_BASE_ADDR