2 * Copyright (C) 2015 Freescale Semiconductor, Inc.
4 * Configuration settings for the Freescale i.MX6UL 14x14 EVK board.
6 * SPDX-License-Identifier: GPL-2.0+
8 #ifndef __MX6UL_14X14_EVK_CONFIG_H
9 #define __MX6UL_14X14_EVK_CONFIG_H
12 #include <asm/arch/imx-regs.h>
13 #include <linux/sizes.h>
14 #include "mx6_common.h"
15 #include <asm/imx-common/gpio.h>
18 #define CONFIG_SPL_LIBCOMMON_SUPPORT
19 #define CONFIG_SPL_MMC_SUPPORT
20 #define CONFIG_SPL_FAT_SUPPORT
23 #define CONFIG_ROM_UNIFIED_SECTIONS
24 #define CONFIG_SYS_GENERIC_BOARD
25 #define CONFIG_DISPLAY_CPUINFO
26 #define CONFIG_DISPLAY_BOARDINFO
28 /* Size of malloc() pool */
29 #define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M)
31 #define CONFIG_BOARD_EARLY_INIT_F
32 #define CONFIG_BOARD_LATE_INIT
34 #define CONFIG_MXC_UART
35 #define CONFIG_MXC_UART_BASE UART1_BASE
37 #define CONFIG_CMD_FUSE
38 #ifdef CONFIG_CMD_FUSE
39 #define CONFIG_MXC_OCOTP
43 #ifdef CONFIG_FSL_USDHC
44 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
46 /* NAND pin conflicts with usdhc2 */
47 #ifdef CONFIG_NAND_MXS
48 #define CONFIG_SYS_FSL_USDHC_NUM 1
50 #define CONFIG_SYS_FSL_USDHC_NUM 2
53 #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
56 #undef CONFIG_BOOTM_NETBSD
57 #undef CONFIG_BOOTM_PLAN9
58 #undef CONFIG_BOOTM_RTEMS
60 #undef CONFIG_CMD_EXPORTENV
61 #undef CONFIG_CMD_IMPORTENV
64 #define CONFIG_CMD_I2C
66 #define CONFIG_SYS_I2C
67 #define CONFIG_SYS_I2C_MXC
68 #define CONFIG_SYS_I2C_SPEED 100000
71 #define PHYS_SDRAM_SIZE SZ_512M
73 #undef CONFIG_CMD_IMLS
75 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1
77 #define CONFIG_EXTRA_ENV_SETTINGS \
81 "fdt_high=0xffffffff\0" \
82 "initrd_high=0xffffffff\0" \
83 "fdt_file=imx6ul-14x14-evk.dtb\0" \
84 "fdt_addr=0x83000000\0" \
87 "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
88 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
89 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
90 "mmcautodetect=yes\0" \
91 "mmcargs=setenv bootargs console=${console},${baudrate} " \
94 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
95 "bootscript=echo Running bootscript from mmc ...; " \
97 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
98 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
99 "mmcboot=echo Booting from mmc ...; " \
101 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
102 "if run loadfdt; then " \
103 "bootz ${loadaddr} - ${fdt_addr}; " \
105 "if test ${boot_fdt} = try; then " \
108 "echo WARN: Cannot load the DT; " \
114 "netargs=setenv bootargs console=${console},${baudrate} " \
116 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
117 "netboot=echo Booting from net ...; " \
119 "if test ${ip_dyn} = yes; then " \
120 "setenv get_cmd dhcp; " \
122 "setenv get_cmd tftp; " \
124 "${get_cmd} ${image}; " \
125 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
126 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
127 "bootz ${loadaddr} - ${fdt_addr}; " \
129 "if test ${boot_fdt} = try; then " \
132 "echo WARN: Cannot load the DT; " \
139 #define CONFIG_BOOTCOMMAND \
140 "mmc dev ${mmcdev};" \
141 "mmc dev ${mmcdev}; if mmc rescan; then " \
142 "if run loadbootscript; then " \
145 "if run loadimage; then " \
147 "else run netboot; " \
150 "else run netboot; fi"
152 /* Miscellaneous configurable options */
153 /* Print Buffer Size */
154 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
156 #define CONFIG_CMD_MEMTEST
157 #define CONFIG_SYS_MEMTEST_START 0x80000000
158 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x10000000)
160 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
161 #define CONFIG_SYS_HZ 1000
163 #define CONFIG_CMDLINE_EDITING
164 #define CONFIG_STACKSIZE SZ_128K
166 /* Physical Memory Map */
167 #define CONFIG_NR_DRAM_BANKS 1
168 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
170 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
171 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
172 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
174 #define CONFIG_SYS_INIT_SP_OFFSET \
175 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
176 #define CONFIG_SYS_INIT_SP_ADDR \
177 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
179 /* FLASH and environment organization */
180 #define CONFIG_SYS_NO_FLASH
182 #define CONFIG_ENV_SIZE SZ_8K
183 #define CONFIG_ENV_IS_IN_MMC
184 #define CONFIG_ENV_OFFSET (8 * SZ_64K)
185 #define CONFIG_SYS_MMC_ENV_DEV 1 /* USDHC2 */
186 #define CONFIG_SYS_MMC_ENV_PART 0 /* user area */
187 #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */
189 #define CONFIG_OF_LIBFDT
190 #define CONFIG_CMD_BOOTZ
191 #define CONFIG_CMD_BMODE
193 #ifndef CONFIG_SYS_DCACHE_OFF
194 #define CONFIG_CMD_CACHE
197 #define CONFIG_FSL_QSPI
198 #ifdef CONFIG_FSL_QSPI
199 #define CONFIG_CMD_SF
200 #define CONFIG_SPI_FLASH
201 #define CONFIG_SPI_FLASH_STMICRO
202 #define CONFIG_SPI_FLASH_BAR
203 #define CONFIG_SF_DEFAULT_BUS 0
204 #define CONFIG_SF_DEFAULT_CS 0
205 #define CONFIG_SF_DEFAULT_SPEED 40000000
206 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
207 #define FSL_QSPI_FLASH_NUM 1
208 #define FSL_QSPI_FLASH_SIZE SZ_32M
212 #define CONFIG_CMD_USB
213 #ifdef CONFIG_CMD_USB
214 #define CONFIG_USB_EHCI
215 #define CONFIG_USB_EHCI_MX6
216 #define CONFIG_USB_STORAGE
217 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
218 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
219 #define CONFIG_MXC_USB_FLAGS 0
220 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
223 #define CONFIG_IMX6_THERMAL