2 * Copyright (C) 2016 Freescale Semiconductor, Inc.
4 * Configuration settings for the Freescale i.MX7ULP EVK board.
6 * SPDX-License-Identifier: GPL-2.0+
9 #ifndef __MX7ULP_EVK_CONFIG_H
10 #define __MX7ULP_EVK_CONFIG_H
12 #include <linux/sizes.h>
13 #include <asm/arch/imx-regs.h>
15 /*Uncomment it to use secure boot*/
16 /*#define CONFIG_SECURE_BOOT*/
18 #ifdef CONFIG_SECURE_BOOT
19 #ifndef CONFIG_CSF_SIZE
20 #define CONFIG_CSF_SIZE 0x4000
24 #define CONFIG_BOARD_POSTCLK_INIT
25 #define CONFIG_SYS_BOOTM_LEN 0x1000000
27 #define SRC_BASE_ADDR CMC1_RBASE
28 #define IRAM_BASE_ADDR OCRAM_0_BASE
29 #define IOMUXC_BASE_ADDR IOMUXC1_RBASE
31 #define CONFIG_ENV_IS_NOWHERE
32 #define CONFIG_ENV_SIZE SZ_8K
34 #define CONFIG_CMD_FAT
35 #define CONFIG_DOS_PARTITION
37 /* Using ULP WDOG for reset */
38 #define WDOG_BASE_ADDR WDG1_RBASE
40 #define CONFIG_SYS_ARCH_TIMER
41 #define CONFIG_SYS_HZ_CLOCK 1000000 /* Fixed at 1Mhz from TSTMR */
43 #define CONFIG_INITRD_TAG
44 #define CONFIG_CMDLINE_TAG
45 #define CONFIG_SETUP_MEMORY_TAGS
46 /*#define CONFIG_REVISION_TAG*/
48 /* Size of malloc() pool */
49 #define CONFIG_SYS_MALLOC_LEN (8 * SZ_1M)
51 #define CONFIG_BOARD_EARLY_INIT_F
54 #define LPUART_BASE LPUART4_RBASE
56 /* allow to overwrite serial and ethaddr */
57 #define CONFIG_ENV_OVERWRITE
58 #define CONFIG_CONS_INDEX 1
59 #define CONFIG_BAUDRATE 115200
61 #undef CONFIG_CMD_IMLS
62 #define CONFIG_SYS_LONGHELP
63 #define CONFIG_AUTO_COMPLETE
65 #define CONFIG_SYS_CACHELINE_SIZE 64
67 /* Miscellaneous configurable options */
68 #define CONFIG_SYS_PROMPT "=> "
69 #define CONFIG_SYS_CBSIZE 512
71 /* Print Buffer Size */
72 #define CONFIG_SYS_MAXARGS 256
73 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
74 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
76 #define CONFIG_CMDLINE_EDITING
77 #define CONFIG_STACKSIZE SZ_8K
79 /* Physical Memory Map */
80 #define CONFIG_NR_DRAM_BANKS 1
82 #define CONFIG_SYS_TEXT_BASE 0x67800000
83 #define PHYS_SDRAM 0x60000000
84 #define PHYS_SDRAM_SIZE SZ_1G
85 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
86 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
87 #define CONFIG_CMD_BOOTZ
89 #define CONFIG_LOADADDR 0x60800000
91 #define CONFIG_CMD_MEMTEST
92 #define CONFIG_SYS_MEMTEST_END 0x9E000000
94 #define CONFIG_SYS_HZ 1000
95 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
97 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
98 #define CONFIG_SYS_INIT_RAM_SIZE SZ_256K
100 #define CONFIG_SYS_INIT_SP_OFFSET \
101 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
102 #define CONFIG_SYS_INIT_SP_ADDR \
103 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
105 #ifndef CONFIG_SYS_DCACHE_OFF
106 #define CONFIG_CMD_CACHE
109 #endif /* __CONFIG_H */