2 * Copyright (C) 2013 Marek Vasut <marex@denx.de>
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation; either version 2 of
7 * the License, or (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
19 #ifndef __CONFIGS_MXS_H__
20 #define __CONFIGS_MXS_H__
26 #if defined(CONFIG_MX23) && defined(CONFIG_MX28)
27 #error Select either CONFIG_MX23 or CONFIG_MX28 , never both!
28 #elif !defined(CONFIG_MX23) && !defined(CONFIG_MX28)
29 #error Select one of CONFIG_MX23 or CONFIG_MX28 !
32 #include <asm/arch/regs-base.h>
34 #if defined(CONFIG_MX23)
35 #include <asm/arch/iomux-mx23.h>
36 #elif defined(CONFIG_MX28)
37 #include <asm/arch/iomux-mx28.h>
45 #define CONFIG_BOARD_EARLY_INIT_F
46 #define CONFIG_ARCH_MISC_INIT
49 #define CONFIG_SPL_NO_CPU_SUPPORT_CODE
50 #define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mxs"
51 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds"
52 #define CONFIG_SPL_LIBCOMMON_SUPPORT
53 #define CONFIG_SPL_LIBGENERIC_SUPPORT
54 #define CONFIG_SPL_SERIAL_SUPPORT
57 #define CONFIG_SYS_MALLOC_LEN 0x00400000 /* 4 MB for malloc */
58 #define CONFIG_SYS_MEMTEST_START 0x40000000 /* Memtest start adr */
59 #define CONFIG_SYS_MEMTEST_END 0x40400000 /* 4 MB RAM test */
61 /* OCRAM at 0x0 ; 32kB on MX23 ; 128kB on MX28 */
62 #define CONFIG_SYS_INIT_RAM_ADDR 0x00000000
63 #if defined(CONFIG_MX23)
64 #define CONFIG_SYS_INIT_RAM_SIZE (32 * 1024)
65 #elif defined(CONFIG_MX28)
66 #define CONFIG_SYS_INIT_RAM_SIZE (128 * 1024)
69 /* Point initial SP in SRAM so SPL can use it too. */
70 #define CONFIG_SYS_INIT_SP_OFFSET \
71 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
72 #define CONFIG_SYS_INIT_SP_ADDR \
73 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
76 * We need to sacrifice first 4 bytes of RAM here to avoid triggering some
77 * strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot
78 * binary. In case there was more of this mess, 0x100 bytes are skipped.
80 * In case of a HAB boot, we cannot for some weird reason use the first 4KiB
81 * of DRAM when loading. Moreover, we use the first 4 KiB for IVT and CST
82 * blocks, thus U-Boot starts at offset +8 KiB of DRAM start.
84 * As for the SPL, we must avoid the first 4 KiB as well, but we load the
85 * IVT and CST to 0x8000, so we don't need to waste the subsequent 4 KiB.
87 #define CONFIG_SYS_TEXT_BASE 0x40002000
88 #define CONFIG_SPL_TEXT_BASE 0x00001000
90 /* U-Boot general configuration */
91 #define CONFIG_SYS_LONGHELP
92 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */
93 #define CONFIG_SYS_MAXARGS 32 /* Max number of command args */
94 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
95 /* Boot argument buffer size */
96 #define CONFIG_AUTO_COMPLETE /* Command auto complete */
97 #define CONFIG_CMDLINE_EDITING /* Command history etc */
100 #define CONFIG_CMDLINE_TAG
101 #define CONFIG_SETUP_MEMORY_TAGS
108 #define CONFIG_APBH_DMA
111 #define CONFIG_MXS_GPIO
114 * DUART Serial Driver.
115 * Conflicts with AUART driver which can be set by board.
117 #define CONFIG_PL011_SERIAL
118 #define CONFIG_PL011_CLOCK 24000000
119 #define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE }
120 #define CONFIG_CONS_INDEX 0
121 /* Default baudrate can be overridden by board! */
122 #ifndef CONFIG_BAUDRATE
123 #define CONFIG_BAUDRATE 115200
126 /* FEC Ethernet on SoC */
127 #ifdef CONFIG_FEC_MXC
129 #ifndef CONFIG_ETHPRIME
130 #define CONFIG_ETHPRIME "FEC0"
132 #ifndef CONFIG_FEC_XCV_TYPE
133 #define CONFIG_FEC_XCV_TYPE RMII
138 #ifdef CONFIG_CMD_I2C
139 #define CONFIG_SYS_I2C
140 #define CONFIG_SYS_I2C_MXS
141 #define CONFIG_HARD_I2C
142 #ifndef CONFIG_SYS_I2C_SPEED
143 #define CONFIG_SYS_I2C_SPEED 400000
149 #define CONFIG_CFB_CONSOLE
150 #define CONFIG_VIDEO_MXS
151 #define CONFIG_VIDEO_SW_CURSOR
152 #define CONFIG_VGA_AS_SINGLE_DEVICE
153 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
157 #ifdef CONFIG_CMD_MMC
159 #define CONFIG_GENERIC_MMC
160 #define CONFIG_BOUNCE_BUFFER
161 #define CONFIG_MXS_MMC
165 #ifdef CONFIG_CMD_NAND
166 #define CONFIG_NAND_MXS
167 #define CONFIG_SYS_MAX_NAND_DEVICE 1
168 #define CONFIG_SYS_NAND_BASE 0x60000000
169 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
173 #ifdef CONFIG_CMD_FUSE
174 #define CONFIG_MXS_OCOTP
178 #ifdef CONFIG_CMD_SPI
179 #define CONFIG_HARD_SPI
180 #define CONFIG_MXS_SPI
181 #define CONFIG_SPI_HALF_DUPLEX
185 #ifdef CONFIG_CMD_USB
186 #define CONFIG_USB_EHCI
187 #define CONFIG_USB_EHCI_MXS
188 #define CONFIG_EHCI_IS_TDI
191 #endif /* __CONFIGS_MXS_H__ */