2 * Common configuration settings for the TI OMAP3 EVM board.
4 * Copyright (C) 2006-2011 Texas Instruments Incorporated - http://www.ti.com/
6 * SPDX-License-Identifier: GPL-2.0+
9 #ifndef __OMAP3_EVM_COMMON_H
10 #define __OMAP3_EVM_COMMON_H
13 * High level configuration options
15 #define CONFIG_OMAP /* This is TI OMAP core */
16 #define CONFIG_OMAP_GPIO
17 #define CONFIG_OMAP_COMMON
18 /* Common ARM Erratas */
19 #define CONFIG_ARM_ERRATA_454179
20 #define CONFIG_ARM_ERRATA_430973
21 #define CONFIG_ARM_ERRATA_621766
23 #define CONFIG_SDRC /* The chip has SDRC controller */
25 #define CONFIG_OMAP3_EVM /* This is a OMAP3 EVM */
26 #define CONFIG_TWL4030_POWER /* with TWL4030 PMIC */
29 * Clock related definitions
31 #define V_OSCK 26000000 /* Clock output from T2 */
32 #define V_SCLK (V_OSCK >> 1)
35 * OMAP3 has 12 GP timers, they can be driven by the system clock
36 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
37 * This rate is divided by a local divisor.
39 #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
40 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
42 /* Size of environment - 128KB */
43 #define CONFIG_ENV_SIZE (128 << 10)
45 /* Size of malloc pool */
46 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
50 * Note 1: CS1 may or may not be populated
51 * Note 2: SDRAM size is expected to be at least 32MB
53 #define CONFIG_NR_DRAM_BANKS 2
54 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
55 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
57 /* Limits for memtest */
58 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
59 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
60 0x01F00000) /* 31MB */
62 /* Default load address */
63 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0)
65 /* -----------------------------------------------------------------------------
67 * -----------------------------------------------------------------------------
71 * NS16550 Configuration
73 #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
75 #define CONFIG_SYS_NS16550
76 #define CONFIG_SYS_NS16550_SERIAL
77 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
78 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
81 * select serial console configuration
83 #define CONFIG_CONS_INDEX 1
84 #define CONFIG_SERIAL1 1 /* UART1 on OMAP3 EVM */
85 #define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1
86 #define CONFIG_BAUDRATE 115200
87 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
93 #define CONFIG_SYS_I2C
94 #define CONFIG_SYS_OMAP24_I2C_SPEED 100000
95 #define CONFIG_SYS_OMAP24_I2C_SLAVE 1
96 #define CONFIG_SYS_I2C_OMAP34XX
101 /* Monitor at start of flash - Reserve 2 sectors */
102 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
104 #define CONFIG_SYS_MONITOR_LEN (256 << 10)
106 /* Start location & size of environment */
107 #define ONENAND_ENV_OFFSET 0x260000
108 #define SMNAND_ENV_OFFSET 0x260000
110 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
115 /* Physical address to access NAND */
116 #define CONFIG_SYS_NAND_ADDR NAND_BASE
118 /* Physical address to access NAND at CS0 */
119 #define CONFIG_SYS_NAND_BASE NAND_BASE
121 /* Max number of NAND devices */
122 #define CONFIG_SYS_MAX_NAND_DEVICE 1
123 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
124 /* Timeout values (in ticks) */
125 #define CONFIG_SYS_FLASH_ERASE_TOUT (100 * CONFIG_SYS_HZ)
126 #define CONFIG_SYS_FLASH_WRITE_TOUT (100 * CONFIG_SYS_HZ)
128 /* Flash banks JFFS2 should use */
129 #define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \
130 CONFIG_SYS_MAX_NAND_DEVICE)
132 #define CONFIG_SYS_JFFS2_MEM_NAND
133 #define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS
134 #define CONFIG_SYS_JFFS2_NUM_BANKS 1
136 #define CONFIG_JFFS2_NAND
137 /* nand device jffs2 lives on */
138 #define CONFIG_JFFS2_DEV "nand0"
139 /* Start of jffs2 partition */
140 #define CONFIG_JFFS2_PART_OFFSET 0x680000
141 /* Size of jffs2 partition */
142 #define CONFIG_JFFS2_PART_SIZE 0xf980000
147 #ifdef CONFIG_USB_OMAP3
149 #ifdef CONFIG_USB_MUSB_HCD
150 #define CONFIG_CMD_USB
152 #define CONFIG_USB_STORAGE
153 #define CONGIG_CMD_STORAGE
154 #define CONFIG_CMD_FAT
156 #ifdef CONFIG_USB_KEYBOARD
157 #define CONFIG_SYS_USB_EVENT_POLL
158 #define CONFIG_PREBOOT "usb start"
159 #endif /* CONFIG_USB_KEYBOARD */
161 #endif /* CONFIG_USB_MUSB_HCD */
163 #ifdef CONFIG_USB_MUSB_UDC
164 /* USB device configuration */
165 #define CONFIG_USB_DEVICE
166 #define CONFIG_USB_TTY
167 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
169 /* Change these to suit your needs */
170 #define CONFIG_USBD_VENDORID 0x0451
171 #define CONFIG_USBD_PRODUCTID 0x5678
172 #define CONFIG_USBD_MANUFACTURER "Texas Instruments"
173 #define CONFIG_USBD_PRODUCT_NAME "EVM"
174 #endif /* CONFIG_USB_MUSB_UDC */
176 #endif /* CONFIG_USB_OMAP3 */
178 /* ----------------------------------------------------------------------------
180 * ----------------------------------------------------------------------------
182 #define CONFIG_SYS_MAXARGS 16 /* max args for a command */
184 #define CONFIG_MISC_INIT_R
186 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
187 #define CONFIG_SETUP_MEMORY_TAGS
188 #define CONFIG_INITRD_TAG
189 #define CONFIG_REVISION_TAG
191 /* Size of Console IO buffer */
192 #define CONFIG_SYS_CBSIZE 512
194 /* Size of print buffer */
195 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
196 sizeof(CONFIG_SYS_PROMPT) + 16)
198 /* Size of bootarg buffer */
199 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
201 #define CONFIG_BOOTFILE "uImage"
206 #if defined(CONFIG_CMD_NAND)
207 #define CONFIG_SYS_FLASH_BASE NAND_BASE
209 #define CONFIG_NAND_OMAP_GPMC
210 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
211 #elif defined(CONFIG_CMD_ONENAND)
212 #define CONFIG_SYS_FLASH_BASE ONENAND_MAP
213 #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
216 #if !defined(CONFIG_ENV_IS_NOWHERE)
217 #if defined(CONFIG_CMD_NAND)
218 #define CONFIG_ENV_IS_IN_NAND
219 #elif defined(CONFIG_CMD_ONENAND)
220 #define CONFIG_ENV_IS_IN_ONENAND
221 #define CONFIG_ENV_OFFSET ONENAND_ENV_OFFSET
223 #endif /* CONFIG_ENV_IS_NOWHERE */
225 #define CONFIG_ENV_ADDR CONFIG_ENV_OFFSET
227 #if defined(CONFIG_CMD_NET)
229 /* Ethernet (SMSC9115 from SMSC9118 family) */
230 #define CONFIG_SMC911X
231 #define CONFIG_SMC911X_32_BIT
232 #define CONFIG_SMC911X_BASE 0x2C000000
235 #define CONFIG_BOOTP_SUBNETMASK 0x00000001
236 #define CONFIG_BOOTP_GATEWAY 0x00000002
237 #define CONFIG_BOOTP_HOSTNAME 0x00000004
238 #define CONFIG_BOOTP_BOOTPATH 0x00000010
240 #endif /* CONFIG_CMD_NET */
242 /* Support for relocation */
243 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
244 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
245 #define CONFIG_SYS_INIT_RAM_SIZE 0x800
246 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
247 CONFIG_SYS_INIT_RAM_SIZE - \
248 GENERATED_GBL_DATA_SIZE)
250 /* -----------------------------------------------------------------------------
252 * -----------------------------------------------------------------------------
254 #define CONFIG_SYS_NO_FLASH
256 /* Uncomment to define the board revision statically */
257 /* #define CONFIG_STATIC_BOARD_REV OMAP3EVM_BOARD_GEN_2 */
259 #define CONFIG_SYS_CACHELINE_SIZE 64
261 /* Defines for SPL */
262 #define CONFIG_SPL_FRAMEWORK
263 #define CONFIG_SPL_TEXT_BASE 0x40200800
264 #define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */
266 #define CONFIG_SPL_BSS_START_ADDR 0x80000000
267 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
269 #define CONFIG_SPL_BOARD_INIT
270 #define CONFIG_SPL_LIBCOMMON_SUPPORT
271 #define CONFIG_SPL_LIBDISK_SUPPORT
272 #define CONFIG_SPL_I2C_SUPPORT
273 #define CONFIG_SPL_LIBGENERIC_SUPPORT
274 #define CONFIG_SPL_SERIAL_SUPPORT
275 #define CONFIG_SPL_POWER_SUPPORT
276 #define CONFIG_SPL_OMAP3_ID_NAND
277 #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
280 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
281 * 64 bytes before this address should be set aside for u-boot.img's
282 * header. That is 0x800FFFC0--0x80100000 should not be used for any
285 #define CONFIG_SYS_TEXT_BASE 0x80100000
286 #define CONFIG_SYS_SPL_MALLOC_START 0x80208000
287 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
289 #endif /* __OMAP3_EVM_COMMON_H */