2 * (C) Copyright 2011 Logic Product Development <www.logicpd.com>
3 * Peter Barada <peter.barada@logicpd.com>
5 * Configuration settings for the Logic OMAP35x/DM37x SOM LV/Torpedo
8 * SPDX-License-Identifier: GPL-2.0+
15 * High Level Configuration Options
18 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
19 #define CONFIG_SYS_TEXT_BASE 0x80400000
21 #include <configs/ti_omap3_common.h>
22 #define CONFIG_OMAP3_LOGIC /* working with Logic OMAP boards */
24 * Display CPU and Board information
27 #define CONFIG_DISPLAY_CPUINFO
28 #define CONFIG_DISPLAY_BOARDINFO
31 #define V_OSCK 26000000 /* Clock output from T2 */
32 #define V_SCLK (V_OSCK >> 1)
34 #define CONFIG_MISC_INIT_R /* misc_init_r dumps the die id */
36 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
37 #define CONFIG_SETUP_MEMORY_TAGS
38 #define CONFIG_INITRD_TAG
39 #define CONFIG_REVISION_TAG
41 #define CONFIG_CMDLINE_EDITING /* cmd line edit/history */
42 #define CONFIG_ZERO_BOOTDELAY_CHECK /* check keypress w/no delay */
45 * Size of malloc() pool
47 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
54 * select serial console configuration
56 #undef CONFIG_CONS_INDEX
57 #define CONFIG_CONS_INDEX 1
58 #define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1
59 #define CONFIG_SERIAL1 1 /* UART1 on OMAP Logic boards */
61 /* allow to overwrite serial and ethaddr */
62 #define CONFIG_ENV_OVERWRITE
63 #define CONFIG_BAUDRATE 115200
64 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
66 #define CONFIG_GENERIC_MMC
68 #define CONFIG_OMAP_HSMMC
69 #define CONFIG_DOS_PARTITION
71 /* commands to include */
72 #define CONFIG_CMD_CACHE
73 #define CONFIG_CMD_EXT2 /* EXT2 Support */
74 #define CONFIG_CMD_FAT /* FAT support */
75 #define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */
76 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
77 #define MTDIDS_DEFAULT "nand0=omap2-nand.0"
78 #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:512k(x-loader),"\
79 "1920k(u-boot),128k(u-boot-env),"\
82 #define CONFIG_CMD_I2C /* I2C serial bus support */
83 #define CONFIG_CMD_MMC /* MMC support */
84 #define CONFIG_CMD_NAND /* NAND support */
85 #define CONFIG_CMD_NAND_LOCK_UNLOCK /* nand (un)lock commands */
86 #define CONFIG_CMD_PING
87 #define CONFIG_CMD_DHCP
89 #define CONFIG_SYS_NO_FLASH
94 #define CONFIG_SYS_I2C
95 #define CONFIG_SYS_OMAP24_I2C_SPEED 100000
96 #define CONFIG_SYS_OMAP24_I2C_SLAVE 1
97 #define CONFIG_SYS_I2C_OMAP34XX
107 #define CONFIG_SYS_NAND_BASE NAND_BASE
108 #define CONFIG_NAND_OMAP_GPMC
109 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
113 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */
115 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
118 /* Environment information */
121 * PREBOOT assumes the 4.3" display is attached. User can interrupt
122 * and modify display variable to suit their needs.
124 #define CONFIG_PREBOOT \
125 "echo ======================NOTICE============================;"\
126 "echo \"The u-boot environment is not set.\";" \
127 "echo \"If using a display a valid display varible for your panel\";" \
128 "echo \"needs to be set.\";" \
129 "echo \"Valid display options are:\";" \
130 "echo \" 2 == LQ121S1DG31 TFT SVGA (12.1) Sharp\";" \
131 "echo \" 3 == LQ036Q1DA01 TFT QVGA (3.6) Sharp w/ASIC\";" \
132 "echo \" 5 == LQ064D343 TFT VGA (6.4) Sharp\";" \
133 "echo \" 7 == LQ10D368 TFT VGA (10.4) Sharp\";" \
134 "echo \" 15 == LQ043T1DG01 TFT WQVGA (4.3) Sharp (DEFAULT)\";" \
135 "echo \" vga[-dvi or -hdmi] LCD VGA 640x480\";" \
136 "echo \" svga[-dvi or -hdmi] LCD SVGA 800x600\";" \
137 "echo \" xga[-dvi or -hdmi] LCD XGA 1024x768\";" \
138 "echo \" 720p[-dvi or -hdmi] LCD 720P 1280x720\";" \
139 "echo \"Defaulting to 4.3 LCD panel (display=15).\";" \
140 "setenv display 15;" \
145 #define CONFIG_EXTRA_ENV_SETTINGS \
146 "loadaddr=0x81000000\0" \
147 "bootfile=uImage\0" \
148 "mtdids=" MTDIDS_DEFAULT "\0" \
149 "mtdparts=" MTDPARTS_DEFAULT "\0" \
151 "autoboot=mmc dev ${mmcdev}; if mmc rescan; then " \
152 "if run loadbootscript; then " \
157 "else run defaultboot; fi\0" \
158 "defaultboot=run mmcramboot\0" \
159 "consoledevice=ttyO0\0" \
161 "setconsole=setenv console ${consoledevice},${baudrate}n8\0" \
162 "dump_bootargs=echo 'Bootargs: '; echo $bootargs\0" \
164 "vrfb_arg=if itest ${rotation} -ne 0; then " \
165 "setenv bootargs ${bootargs} omapfb.vrfb=y " \
166 "omapfb.rotate=${rotation}; " \
168 "otherbootargs=ignore_loglevel early_printk no_console_suspend\0" \
169 "addmtdparts=setenv bootargs ${bootargs} ${mtdparts}\0" \
170 "common_bootargs=setenv bootargs ${bootargs} display=${display} " \
171 "${otherbootargs};" \
172 "run addmtdparts; " \
174 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
175 "bootscript=echo 'Running bootscript from mmc ...'; " \
176 "source ${loadaddr}\0" \
177 "loaduimage=mmc rescan ${mmcdev}; " \
178 "fatload mmc ${mmcdev} ${loadaddr} ${bootfile}\0" \
179 "ramdisksize=64000\0" \
180 "ramdiskaddr=0x82000000\0" \
181 "ramdiskimage=rootfs.ext2.gz.uboot\0" \
182 "ramargs=run setconsole; setenv bootargs console=${console} " \
183 "root=/dev/ram rw ramdisk_size=${ramdisksize}\0" \
184 "mmcramboot=echo 'Booting kernel from mmc w/ramdisk...'; " \
186 "run common_bootargs; " \
187 "run dump_bootargs; " \
189 "fatload mmc ${mmcdev} ${ramdiskaddr} ${ramdiskimage}; "\
190 "bootm ${loadaddr} ${ramdiskaddr}\0" \
191 "ramboot=echo 'Booting kernel/ramdisk rootfs from tftp...'; " \
193 "run common_bootargs; " \
194 "run dump_bootargs; " \
195 "tftpboot ${loadaddr} ${bootfile}; "\
196 "tftpboot ${ramdiskaddr} ${ramdiskimage}; "\
197 "bootm ${loadaddr} ${ramdiskaddr}\0"
199 #define CONFIG_BOOTCOMMAND \
202 #define CONFIG_AUTO_COMPLETE
204 * Miscellaneous configurable options
206 #define CONFIG_SYS_LONGHELP /* undef to save memory */
207 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
208 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
209 /* Print Buffer Size */
210 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
211 sizeof(CONFIG_SYS_PROMPT) + 16)
214 /* memtest works on */
215 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
216 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
217 0x01F00000) /* 31MB */
220 * OMAP3 has 12 GP timers, they can be driven by the system clock
221 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
222 * This rate is divided by a local divisor.
224 #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
225 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
228 * Physical Memory Map
230 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
231 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
232 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
235 * FLASH and environment organization
238 /* **** PISMO SUPPORT *** */
239 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
241 #if defined(CONFIG_CMD_NAND)
242 #define CONFIG_SYS_FLASH_BASE NAND_BASE
243 #elif defined(CONFIG_CMD_ONENAND)
244 #define CONFIG_SYS_FLASH_BASE ONENAND_MAP
247 /* Monitor at start of flash */
248 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
250 #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
252 #if defined(CONFIG_CMD_NAND)
253 #define CONFIG_NAND_OMAP_GPMC
254 #define CONFIG_ENV_IS_IN_NAND
255 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
258 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
259 #define CONFIG_ENV_ADDR CONFIG_ENV_OFFSET
261 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
262 #define CONFIG_SYS_INIT_RAM_SIZE 0x800
267 #if defined(CONFIG_CMD_NET)
269 #define CONFIG_SMC911X
270 #define CONFIG_SMC911X_16_BIT
271 #define CONFIG_SMC911X_BASE 0x08000000
273 #endif /* (CONFIG_CMD_NET) */
275 #endif /* __CONFIG_H */