2 * Configuration settings for the Gumstix Overo board.
4 * SPDX-License-Identifier: GPL-2.0+
10 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
13 #include <configs/ti_omap3_common.h>
14 #undef CONFIG_SPL_MAX_SIZE
15 #undef CONFIG_SPL_TEXT_BASE
16 #define CONFIG_SPL_TEXT_BASE 0x40200000
17 #define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - CONFIG_SPL_TEXT_BASE)
21 /* Display CPU and Board information */
22 #define CONFIG_DISPLAY_CPUINFO
23 #define CONFIG_DISPLAY_BOARDINFO
25 /* call misc_init_r */
26 #define CONFIG_MISC_INIT_R
28 /* pass the revision tag */
29 #define CONFIG_REVISION_TAG
31 /* override size of malloc() pool */
32 #undef CONFIG_SYS_MALLOC_LEN
33 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB sector */
34 /* Shift 128 << 15 provides 4 MiB heap to support UBI commands.
35 * Shift 128 << 10 provides 128 KiB heap for limited-memory devices. */
36 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 15))
39 #define CONFIG_SYS_I2C_OMAP34XX
42 #define CONFIG_TWL4030_LED
45 #define CONFIG_USB_EHCI
46 #define CONFIG_USB_EHCI_OMAP
47 #define CONFIG_USB_STORAGE
48 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 183
49 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
51 /* Initialize GPIOs by default */
52 #define CONFIG_OMAP3_GPIO_2 /* GPIO32..63 is in GPIO Bank 2 */
53 #define CONFIG_OMAP3_GPIO_3 /* GPIO64..95 is in GPIO Bank 3 */
54 #define CONFIG_OMAP3_GPIO_4 /* GPIO96..127 is in GPIO Bank 4 */
55 #define CONFIG_OMAP3_GPIO_5 /* GPIO128..159 is in GPIO Bank 5 */
56 #define CONFIG_OMAP3_GPIO_6 /* GPIO160..191 is in GPIO Bank 6 */
58 /* commands to include */
61 #define CONFIG_CMD_UBI /* UBI-formated MTD partition support */
62 #define CONFIG_CMD_UBIFS /* Read-only UBI volume operations */
64 #define CONFIG_RBTREE /* required by CONFIG_CMD_UBI */
65 #define CONFIG_LZO /* required by CONFIG_CMD_UBIFS */
67 #define CONFIG_MTD_PARTITIONS /* required for UBI partition support */
69 /* NAND block size is 128 KiB. Synchronize these values with
70 * overo_nand_partitions in mach-omap2/board-overo.c in Linux:
71 * xloader 4 * NAND_BLOCK_SIZE = 512 KiB
72 * uboot 14 * NAND_BLOCK_SIZE = 1792 KiB
73 * uboot environtment 2 * NAND_BLOCK_SIZE = 256 KiB
74 * linux 64 * NAND_BLOCK_SIZE = 8 MiB
77 #define MTDIDS_DEFAULT "nand0=omap2-nand.0"
78 #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:" \
84 #else /* CONFIG_NAND */
85 #define MTDPARTS_DEFAULT
86 #endif /* CONFIG_NAND */
88 /* Board NAND Info. */
89 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
91 /* Environment information */
92 #define CONFIG_EXTRA_ENV_SETTINGS \
93 DEFAULT_LINUX_BOOT_ENV \
97 "console=ttyO2,115200n8\0" \
101 "dvimode=1024x768MR-16@60\0" \
102 "defaultdisplay=dvi\0" \
104 "mmcroot=/dev/mmcblk0p2 rw\0" \
105 "mmcrootfstype=ext4 rootwait\0" \
106 "nandroot=ubi0:rootfs ubi.mtd=4\0" \
107 "nandrootfstype=ubifs\0" \
108 "mtdparts=" MTDPARTS_DEFAULT "\0" \
109 "mmcargs=setenv bootargs console=${console} " \
111 "mpurate=${mpurate} " \
113 "omapfb.mode=dvi:${dvimode} " \
114 "omapdss.def_disp=${defaultdisplay} " \
116 "rootfstype=${mmcrootfstype}\0" \
117 "nandargs=setenv bootargs console=${console} " \
119 "mpurate=${mpurate} " \
121 "omapfb.mode=dvi:${dvimode} " \
122 "omapdss.def_disp=${defaultdisplay} " \
123 "root=${nandroot} " \
124 "rootfstype=${nandrootfstype}\0" \
125 "loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \
126 "bootscript=echo Running boot script from mmc ...; " \
127 "source ${loadaddr}\0" \
128 "loadbootenv=load mmc ${mmcdev} ${loadaddr} uEnv.txt\0" \
129 "importbootenv=echo Importing environment from mmc ...; " \
130 "env import -t ${loadaddr} ${filesize}\0" \
131 "loaduimage=load mmc ${mmcdev} ${loadaddr} uImage\0" \
132 "mmcboot=echo Booting from mmc...; " \
134 "bootm ${loadaddr}\0" \
135 "loadzimage=load mmc ${mmcdev}:2 ${loadaddr} ${bootdir}/${bootfile}\0" \
136 "loadfdt=load mmc ${mmcdev}:2 ${fdtaddr} ${bootdir}/${fdtfile}\0" \
137 "loadubizimage=ubifsload ${loadaddr} ${bootdir}/${bootfile}\0" \
138 "loadubifdt=ubifsload ${fdtaddr} ${bootdir}/${fdtfile}\0" \
139 "mmcbootfdt=echo Booting with DT from mmc ...; " \
141 "bootz ${loadaddr} - ${fdtaddr}\0" \
142 "nandboot=echo Booting from nand ...; " \
144 "if nand read ${loadaddr} linux; then " \
145 "bootm ${loadaddr};" \
147 "nanddtsboot=echo Booting from nand with DTS...; " \
150 "ubifsmount ubi0:rootfs; "\
152 "run loadubizimage; "\
153 "bootz ${loadaddr} - ${fdtaddr}\0" \
155 #define CONFIG_BOOTCOMMAND \
156 "mmc dev ${mmcdev}; if mmc rescan; then " \
157 "if run loadbootscript; then " \
160 "if run loadbootenv; then " \
161 "echo Loaded environment from ${bootenv};" \
162 "run importbootenv;" \
164 "if test -n $uenvcmd; then " \
165 "echo Running uenvcmd ...;" \
168 "if run loaduimage; then " \
171 "if run loadzimage; then " \
172 "if test -z \"${fdtfile}\"; then " \
173 "setenv fdtfile omap3-${boardname}-${expansionname}.dtb;" \
175 "if run loadfdt; then " \
181 "if test -z \"${fdtfile}\"; then "\
182 "setenv fdtfile omap3-${boardname}-${expansionname}.dtb;" \
184 "run nanddtsboot; " \
186 /* memtest works on */
187 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
188 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
189 0x01F00000) /* 31MB */
191 /* FLASH and environment organization */
192 #if defined(CONFIG_NAND)
193 #define CONFIG_SYS_FLASH_BASE NAND_BASE
196 /* Monitor at start of flash */
197 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
198 #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
200 #define CONFIG_ENV_IS_IN_NAND
201 #define ONENAND_ENV_OFFSET 0x240000 /* environment starts here */
202 #define SMNAND_ENV_OFFSET 0x240000 /* environment starts here */
204 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
205 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
206 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
208 /* Configure SMSC9211 ethernet */
209 #if defined(CONFIG_CMD_NET)
210 #define CONFIG_SMC911X
211 #define CONFIG_SMC911X_32_BIT
212 #define CONFIG_SMC911X_BASE 0x2C000000
213 #endif /* (CONFIG_CMD_NET) */
215 /* Initial RAM setup */
216 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
217 #define CONFIG_SYS_INIT_RAM_SIZE 0x800
218 #define CONFIG_SYS_CACHELINE_SIZE 64
220 /* NAND boot config */
221 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
222 #define CONFIG_SYS_NAND_MAX_ECCPOS 56
223 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
224 #define CONFIG_SYS_NAND_PAGE_COUNT 64
225 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
226 #define CONFIG_SYS_NAND_OOBSIZE 64
227 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
228 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
229 #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, \
230 13, 14, 16, 17, 18, 19, 20, 21, 22, \
231 23, 24, 25, 26, 27, 28, 30, 31, 32, \
232 33, 34, 35, 36, 37, 38, 39, 40, 41, \
233 42, 44, 45, 46, 47, 48, 49, 50, 51, \
235 #define CONFIG_SYS_NAND_ECCSIZE 512
236 #define CONFIG_SYS_NAND_ECCBYTES 13
237 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
238 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
239 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
240 /* NAND: SPL falcon mode configs */
241 #ifdef CONFIG_SPL_OS_BOOT
242 #define CONFIG_CMD_SPL_NAND_OFS 0x240000
243 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
244 #define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
247 #endif /* __CONFIG_H */